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Merge branch 'YosysHQ:main' into main

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Akash Levy 2025-07-27 03:39:36 -07:00 • committed by GitHub
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tests/verilog/bug4785.ys Normal file
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logger -expect error "Cell arrays of primitives are currently not supported" 1
read_verilog <<EOT
module test(in1, in2, out1);
input in1, in2;
output out1;
nand #2 t_nand[0:7](out1, in1, in2);
endmodule
EOT