mirror of
https://github.com/YosysHQ/yosys
synced 2025-09-03 16:48:07 +00:00
Fix tests; Remove simulation;
- Add -map and -assert options for equiv_opt; !!! '-assert' option was commented for the next tests (unproven $equiv cells was found): - dffs; - div_mod; - latches; - mul_pow; - Add design -load; - Remove simulations;
This commit is contained in:
parent
153ec0541c
commit
71dd412ac5
26 changed files with 33 additions and 519 deletions
13
tests/ice40/div_mod.v
Normal file
13
tests/ice40/div_mod.v
Normal file
|
@ -0,0 +1,13 @@
|
|||
module top
|
||||
(
|
||||
input [3:0] x,
|
||||
input [3:0] y,
|
||||
|
||||
output [3:0] A,
|
||||
output [3:0] B
|
||||
);
|
||||
|
||||
assign A = x % y;
|
||||
assign B = x / y;
|
||||
|
||||
endmodule
|
Loading…
Add table
Add a link
Reference in a new issue