From 719bbd752372dae4f4ed9c5e52b3410e099ebab7 Mon Sep 17 00:00:00 2001 From: Akash Levy Date: Mon, 17 Jun 2024 14:18:41 -0700 Subject: [PATCH] Improve SCC reporting --- frontends/verific/verific.cc | 2 +- passes/cmds/scc.cc | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 2e3fabf9a..1c6210505 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -3246,7 +3246,7 @@ struct VerificPass : public Pass { RuntimeFlags::SetVar("db_allow_external_nets", 1); RuntimeFlags::SetVar("db_infer_wide_operators", 1); - RuntimeFlags::SetVar("db_infer_wide_operators_post_elaboration", 1); // SILIMATE: add to improve optimization (QoR) + // RuntimeFlags::SetVar("db_infer_wide_operators_post_elaboration", 1); // SILIMATE: add to improve optimization (QoR) RuntimeFlags::SetVar("db_infer_set_reset_registers", 0); // Properly respect order of read and write for rams diff --git a/passes/cmds/scc.cc b/passes/cmds/scc.cc index 197bd9319..c17f95470 100644 --- a/passes/cmds/scc.cc +++ b/passes/cmds/scc.cc @@ -89,7 +89,7 @@ struct SccWorker RTLIL::Cell *c = cellStack.back(); cellStack.pop_back(); cellsOnStack.erase(c); - log(" %s", RTLIL::id2cstr(c->name)); + log(" %s %s %s %s,", RTLIL::id2cstr(c->name), RTLIL::id2cstr(c->type), RTLIL::id2cstr(module->name), RTLIL::id2cstr(c->get_src_attribute())); cell2scc[c] = sccList.size(); scc.insert(c); } @@ -203,7 +203,7 @@ struct SccWorker if (!nofeedbackMode && cellToNextCell[cell].count(cell)) { log("Found an SCC:"); pool scc; - log(" %s", RTLIL::id2cstr(cell->name)); + log(" %s %s %s %s,", RTLIL::id2cstr(cell->name), RTLIL::id2cstr(cell->type), RTLIL::id2cstr(module->name), RTLIL::id2cstr(cell->get_src_attribute())); cell2scc[cell] = sccList.size(); scc.insert(cell); sccList.push_back(scc);