mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-07-31 16:33:19 +00:00
Code Activity

Use C++11 final/override keywords.

Browse source
This commit is contained in:
whitequark 2020-06-18 23:34:52 +00:00
parent dfde1cf1c5
commit 7191dd16f9
220 changed files with 540 additions and 548 deletions
Download patch file Download diff file Expand all files Collapse all files

4
techlibs/anlogic/anlogic_eqn.cc
View file

@ -25,7 +25,7 @@ PRIVATE_NAMESPACE_BEGIN
struct AnlogicEqnPass : public Pass {
AnlogicEqnPass() : Pass("anlogic_eqn", "Anlogic: Calculate equations for luts") { }
void help() YS_OVERRIDE
void help() override
{
log("\n");
log(" anlogic_eqn [selection]\n");
@ -63,7 +63,7 @@ struct AnlogicEqnPass : public Pass {
return Const(eqn);
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
void execute(std::vector<std::string> args, RTLIL::Design *design) override
{
log_header(design, "Executing ANLOGIC_EQN pass (calculate equations for luts).\n");

4
techlibs/anlogic/anlogic_fixcarry.cc
View file

@ -98,7 +98,7 @@ static void fix_carry_chain(Module *module)
struct AnlogicCarryFixPass : public Pass {
AnlogicCarryFixPass() : Pass("anlogic_fixcarry", "Anlogic: fix carry chain") { }
void help() YS_OVERRIDE
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@ -107,7 +107,7 @@ struct AnlogicCarryFixPass : public Pass {
log("Add Anlogic adders to fix carry chain if needed.\n");
log("\n");
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
void execute(std::vector<std::string> args, RTLIL::Design *design) override
{
log_header(design, "Executing anlogic_fixcarry pass (fix invalid carry chain).\n");

8
techlibs/anlogic/synth_anlogic.cc
View file

@ -30,7 +30,7 @@ struct SynthAnlogicPass : public ScriptPass
{
SynthAnlogicPass() : ScriptPass("synth_anlogic", "synthesis for Anlogic FPGAs") { }
void help() YS_OVERRIDE
void help() override
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
@ -72,7 +72,7 @@ struct SynthAnlogicPass : public ScriptPass
string top_opt, edif_file, json_file;
bool flatten, retime, nolutram;
void clear_flags() YS_OVERRIDE
void clear_flags() override
{
top_opt = "-auto-top";
edif_file = "";
@ -82,7 +82,7 @@ struct SynthAnlogicPass : public ScriptPass
nolutram = false;
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
void execute(std::vector<std::string> args, RTLIL::Design *design) override
{
string run_from, run_to;
clear_flags();
@ -137,7 +137,7 @@ struct SynthAnlogicPass : public ScriptPass
log_pop();
}
void script() YS_OVERRIDE
void script() override
{
if (check_label("begin"))
{