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synth_nexus to synth_lattice

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This commit is contained in:
Miodrag Milanovic 2023-08-31 13:17:21 +02:00 • committed by Lofty
parent 58f9531bfb
commit 714603bf69
21 changed files with 158 additions and 477 deletions
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12
techlibs/lattice/lutrams.txt
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@ -1,12 +0,0 @@
ram distributed $__TRELLIS_DPR16X4_ {
abits 4;
width 4;
cost 4;
init any;
prune_rom;
port sw "W" {
clock anyedge;
}
port ar "R" {
}
}