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Fix muldiv_c peepopt
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parent
3d127dff4a
commit
70eabb12e8
1 changed files with 12 additions and 8 deletions
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@ -12,8 +12,6 @@ match mul
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endmatch
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endmatch
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code a b_const mul_y
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code a b_const mul_y
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printf("CODING MUL!!!\n");
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// Get multiplier signals
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// Get multiplier signals
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a = port(mul, \A);
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a = port(mul, \A);
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b_const = port(mul, \B);
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b_const = port(mul, \B);
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@ -32,33 +30,39 @@ endcode
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match div
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match div
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// Select div of form (a * b_const) / c_const
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// Select div of form (a * b_const) / c_const
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select div->type == $div
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select div->type == $div
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index <SigSpec> port(div, \A) === port(mul, \Y)
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// Check that b_const and c_const is constant
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// Check that b_const and c_const is constant
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filter port(mul, \B).is_fully_const()
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filter b_const.is_fully_const()
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filter port(div, \B).is_fully_const()
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filter port(div, \B).is_fully_const()
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endmatch
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endmatch
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code
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code
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printf("CODING DIV!!!\n");
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// Get div signals
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// Get div signals
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SigSpec div_a = port(div, \A);
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SigSpec c_const = port(div, \B);
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SigSpec c_const = port(div, \B);
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SigSpec div_y = port(div, \Y);
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SigSpec div_y = port(div, \Y);
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// Get offset of multiplier result chunk in divider
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int offset = GetSize(div_a) - GetSize(mul_y);
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// Get properties and values of b_const and c_const
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// Get properties and values of b_const and c_const
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int b_const_width = mul->getParam(ID::B_WIDTH).as_int();
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int b_const_width = mul->getParam(ID::B_WIDTH).as_int();
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bool b_const_signed = mul->getParam(ID::B_SIGNED).as_bool();
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bool b_const_signed = mul->getParam(ID::B_SIGNED).as_bool();
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bool c_const_signed = div->getParam(ID::B_SIGNED).as_bool();
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bool c_const_signed = div->getParam(ID::B_SIGNED).as_bool();
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int b_const_int = b_const.as_int(b_const_signed);
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int b_const_int = b_const.as_int(b_const_signed);
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int c_const_int = c_const.as_int(c_const_signed);
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int c_const_int = c_const.as_int(c_const_signed);
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int b_const_int_shifted = b_const_int << offset;
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// Check that there are only zeros before offset
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if (offset < 0 || !div_a.extract(0, offset).is_fully_zero())
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reject;
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// Check that b is divisible by c
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// Check that b is divisible by c
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if (b_const_int % c_const_int != 0)
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if (b_const_int_shifted % c_const_int != 0)
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reject;
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reject;
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// Rewire to only keep multiplier
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// Rewire to only keep multiplier
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mul->setPort(\B, Const(b_const_int / c_const_int, b_const_width));
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mul->setPort(\B, Const(b_const_int_shifted / c_const_int, b_const_width));
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mul->setPort(\Y, div_y);
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mul->setPort(\Y, div_y);
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// Remove divider
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// Remove divider
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