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Merge pull request #1325 from YosysHQ/eddie/sat_init
In sat: 'x' in init attr should be ignored
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commit
70c0cddb1e
2 changed files with 8 additions and 2 deletions
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@ -1,6 +1,7 @@
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module test(input clk, input [3:0] bar, output [3:0] foo);
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module test(input clk, input [3:0] bar, output [3:0] foo, asdf);
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reg [3:0] foo = 0;
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reg [3:0] last_bar = 0;
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reg [3:0] asdf = 4'b1xxx;
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always @*
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foo[1:0] <= bar[1:0];
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@ -11,5 +12,10 @@ module test(input clk, input [3:0] bar, output [3:0] foo);
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always @(posedge clk)
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last_bar <= bar;
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always @(posedge clk)
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asdf[3] <= bar[3];
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always @*
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asdf[2:0] = 3'b111;
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assert property (foo == {last_bar[3:2], bar[1:0]});
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endmodule
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