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zinit: operate on $adff, erase (* init *) entries on consumption
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1cdfdbc6d1
commit
70bca35f9c
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@ -57,8 +57,7 @@ struct ZinitPass : public Pass {
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for (auto module : design->selected_modules())
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for (auto module : design->selected_modules())
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{
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{
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SigMap sigmap(module);
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SigMap sigmap(module);
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dict<SigBit, State> initbits;
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dict<SigBit, std::pair<State,SigBit>> initbits;
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pool<SigBit> donebits;
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for (auto wire : module->selected_wires())
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for (auto wire : module->selected_wires())
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{
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{
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@ -67,7 +66,6 @@ struct ZinitPass : public Pass {
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SigSpec wirebits = sigmap(wire);
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SigSpec wirebits = sigmap(wire);
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Const initval = wire->attributes.at(ID::init);
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Const initval = wire->attributes.at(ID::init);
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wire->attributes.erase(ID::init);
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for (int i = 0; i < GetSize(wirebits) && i < GetSize(initval); i++)
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for (int i = 0; i < GetSize(wirebits) && i < GetSize(initval); i++)
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{
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{
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@ -78,22 +76,25 @@ struct ZinitPass : public Pass {
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continue;
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continue;
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if (initbits.count(bit)) {
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if (initbits.count(bit)) {
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if (initbits.at(bit) != val)
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if (initbits.at(bit).first != val)
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log_error("Conflicting init values for signal %s (%s = %s != %s).\n",
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log_error("Conflicting init values for signal %s (%s = %s != %s).\n",
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log_signal(bit), log_signal(SigBit(wire, i)),
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log_signal(bit), log_signal(SigBit(wire, i)),
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log_signal(val), log_signal(initbits.at(bit)));
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log_signal(val), log_signal(initbits.at(bit).first));
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continue;
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continue;
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}
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}
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initbits[bit] = val;
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initbits[bit] = std::make_pair(val,SigBit(wire,i));
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}
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}
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}
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}
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pool<IdString> dff_types = {
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pool<IdString> dff_types = {
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ID($ff), ID($dff), ID($dffe), ID($dffsr), ID($adff),
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// FIXME: It would appear that supporting
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// $dffsr/$_DFFSR_* would require a new
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// cell type where S has priority over R
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ID($ff), ID($dff), ID($dffe), /*ID($dffsr),*/ ID($adff),
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ID($_FF_), ID($_DFFE_NN_), ID($_DFFE_NP_), ID($_DFFE_PN_), ID($_DFFE_PP_),
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ID($_FF_), ID($_DFFE_NN_), ID($_DFFE_NP_), ID($_DFFE_PN_), ID($_DFFE_PP_),
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ID($_DFFSR_NNN_), ID($_DFFSR_NNP_), ID($_DFFSR_NPN_), ID($_DFFSR_NPP_),
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/*ID($_DFFSR_NNN_), ID($_DFFSR_NNP_), ID($_DFFSR_NPN_), ID($_DFFSR_NPP_),
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ID($_DFFSR_PNN_), ID($_DFFSR_PNP_), ID($_DFFSR_PPN_), ID($_DFFSR_PPP_),
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ID($_DFFSR_PNN_), ID($_DFFSR_PNP_), ID($_DFFSR_PPN_), ID($_DFFSR_PPP_),*/
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ID($_DFF_N_), ID($_DFF_NN0_), ID($_DFF_NN1_), ID($_DFF_NP0_), ID($_DFF_NP1_),
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ID($_DFF_N_), ID($_DFF_NN0_), ID($_DFF_NN1_), ID($_DFF_NP0_), ID($_DFF_NP1_),
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ID($_DFF_P_), ID($_DFF_PN0_), ID($_DFF_PN1_), ID($_DFF_PP0_), ID($_DFF_PP1_)
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ID($_DFF_P_), ID($_DFF_PN0_), ID($_DFF_PN1_), ID($_DFF_PP0_), ID($_DFF_PP1_)
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};
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};
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@ -113,8 +114,10 @@ struct ZinitPass : public Pass {
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for (int i = 0; i < GetSize(sig_q); i++) {
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for (int i = 0; i < GetSize(sig_q); i++) {
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if (initbits.count(sig_q[i])) {
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if (initbits.count(sig_q[i])) {
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initval.bits.push_back(initbits.at(sig_q[i]));
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const auto &d = initbits.at(sig_q[i]);
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donebits.insert(sig_q[i]);
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initval.bits.push_back(d.first);
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const auto &b = d.second;
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b.wire->attributes.at(ID::init)[b.offset];
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} else
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} else
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initval.bits.push_back(all_mode ? State::S0 : State::Sx);
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initval.bits.push_back(all_mode ? State::S0 : State::Sx);
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}
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}
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@ -140,13 +143,13 @@ struct ZinitPass : public Pass {
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cell->setPort(ID::D, sig_d);
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cell->setPort(ID::D, sig_d);
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cell->setPort(ID::Q, initwire);
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cell->setPort(ID::Q, initwire);
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/*if (cell->type.in(ID($_DFFSR_NNN_), ID($_DFFSR_NNP_), ID($_DFFSR_NPN_), ID($_DFFSR_NPP_),
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if (cell->type == ID($adff)) {
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ID($_DFFSR_PNN_), ID($_DFFSR_PNP_), ID($_DFFSR_PPN_), ID($_DFFSR_PPP_)))
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auto val = cell->getParam(ID::ARST_VALUE);
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{
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for (auto &b : val)
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// TODO: I think I need a $_DFFRS_* cell where S has priority over R...
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b = (b == State::S1 ? State::S0 : State::S1);
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std::swap(cell->connections_.at(ID(R)), cell->connections_.at(ID(S)));
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cell->setParam(ID::ARST_VALUE, std::move(val));
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}
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}
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else*/ if (cell->type.in(ID($_DFF_NN0_), ID($_DFF_NN1_), ID($_DFF_NP0_), ID($_DFF_NP1_),
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else if (cell->type.in(ID($_DFF_NN0_), ID($_DFF_NN1_), ID($_DFF_NP0_), ID($_DFF_NP1_),
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ID($_DFF_PN0_), ID($_DFF_PN1_), ID($_DFF_PP0_), ID($_DFF_PP1_)))
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ID($_DFF_PN0_), ID($_DFF_PN1_), ID($_DFF_PP0_), ID($_DFF_PP1_)))
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{
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{
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std::string t = cell->type.str();
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std::string t = cell->type.str();
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@ -154,11 +157,6 @@ struct ZinitPass : public Pass {
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cell->type = t;
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cell->type = t;
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}
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}
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}
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}
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if (!design->selected_whole_module(module))
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for (auto &it : initbits)
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if (donebits.count(it.first) == 0)
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log_error("Failed to handle init bit %s = %s.\n", log_signal(it.first), log_signal(it.second));
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}
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}
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}
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}
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} ZinitPass;
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} ZinitPass;
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