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equiv_purge bugfix, using SigChunk in Yosys namespace

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This commit is contained in:
Clifford Wolf 2015-10-24 19:09:45 +02:00
parent 2a0f577f83
commit 6fe48cf41e
5 changed files with 8 additions and 5 deletions
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2
passes/equiv/equiv_miter.cc
View file

@ -156,7 +156,7 @@ struct EquivMiterWorker
struct RewriteSigSpecWorker {
RTLIL::Module * mod;
void operator()(SigSpec &sig) {
vector<RTLIL::SigChunk> chunks = sig.chunks();
vector<SigChunk> chunks = sig.chunks();
for (auto &c : chunks)
if (c.wire != NULL)
c.wire = mod->wires_.at(c.wire->name);

5
passes/equiv/equiv_purge.cc
View file

@ -162,8 +162,9 @@ struct EquivPurgeWorker
srcsig.sort_and_unify();
for (SigSpec sig : srcsig.chunks())
rewrite_sigmap.add(sig, make_input(sig));
for (SigChunk chunk : srcsig.chunks())
if (chunk.wire != nullptr)
rewrite_sigmap.add(chunk, make_input(chunk));
for (auto cell : module->cells())
if (cell->type == "$equiv")