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Added synth_ice40 support for latches via logic loops

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This commit is contained in:
Clifford Wolf 2016-05-06 23:02:37 +02:00
parent d10dfccabb
commit 6fe3d5a1cf
3 changed files with 13 additions and 0 deletions
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11
techlibs/ice40/latches_map.v Normal file
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module \$_DLATCH_N_ (E, D, Q);
wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
input E, D;
output Q = !E ? D : Q;
endmodule
module \$_DLATCH_P_ (E, D, Q);
wire [1023:0] _TECHMAP_DO_ = "simplemap; opt";
input E, D;
output Q = E ? D : Q;
endmodule