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Add missing u sram init (#3)

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add missing INIT for uSRAM
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Tony Min 2024-07-04 16:39:10 -04:00 • committed by GitHub
parent e9ff5f7d91
commit 6fe0e00050
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4 changed files with 64 additions and 14 deletions
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13
techlibs/microchip/cells_sim.v
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@ -847,4 +847,17 @@ module RAM64x12 (
input BUSY_FB,
output ACCESS_BUSY
);
parameter INIT0 = 64'h0;
parameter INIT1 = 64'h0;
parameter INIT2 = 64'h0;
parameter INIT3 = 64'h0;
parameter INIT4 = 64'h0;
parameter INIT5 = 64'h0;
parameter INIT6 = 64'h0;
parameter INIT7 = 64'h0;
parameter INIT8 = 64'h0;
parameter INIT9 = 64'h0;
parameter INIT10 = 64'h0;
parameter INIT11 = 64'h0;
endmodule