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Fixed port ordering in "splitnets" cmd

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This commit is contained in:
Clifford Wolf 2015-09-01 13:10:36 +02:00
parent b10ea0550d
commit 6f9a6fd783
1 changed files with 18 additions and 7 deletions
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25
passes/cmds/splitnets.cc
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@ -50,7 +50,7 @@ struct SplitnetsWorker
new_wire_name += format.substr(1, 1);
RTLIL::Wire *new_wire = module->addWire(module->uniquify(new_wire_name), width);
new_wire->port_id = wire->port_id;
new_wire->port_id = wire->port_id ? wire->port_id + offset : 0;
new_wire->port_input = wire->port_input;
new_wire->port_output = wire->port_output;
@ -130,14 +130,24 @@ struct SplitnetsPass : public Pass {
}
extra_args(args, argidx, design);
for (auto &mod_it : design->modules_)
for (auto module : design->selected_modules())
{
RTLIL::Module *module = mod_it.second;
if (!design->selected(module))
continue;
SplitnetsWorker worker;
if (flag_ports)
{
int normalized_port_factor = 0;
for (auto wire : module->wires())
if (wire->port_id != 0) {
normalized_port_factor = std::max(normalized_port_factor, wire->port_id+1);
normalized_port_factor = std::max(normalized_port_factor, GetSize(wire)+1);
}
for (auto wire : module->wires())
wire->port_id *= normalized_port_factor;
}
if (flag_driver)
{
CellTypes ct(design);
@ -194,7 +204,8 @@ struct SplitnetsPass : public Pass {
delete_wires.insert(it.first);
module->remove(delete_wires);
module->fixup_ports();
if (flag_ports)
module->fixup_ports();
}
}
} SplitnetsPass;