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Add more muxpack tests, with overlapping entries

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This commit is contained in:
Eddie Hung 2019-06-21 11:45:53 -07:00
parent 641b86d25f
commit 6ec8160981
2 changed files with 84 additions and 1 deletions
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55
tests/various/muxpack.v
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@ -187,7 +187,9 @@ module case_nonexclusive_select (
);
always @* begin
case (x)
0, 2: o = b;
//0, 2: o = b;
0: o = b;
2: o = b;
1: o = c;
default: begin
o = a;
@ -197,3 +199,54 @@ module case_nonexclusive_select (
endcase
end
endmodule
module case_nonoverlap (
input wire [2:0] x,
input wire a, b, c, d, e, f, g,
output reg o
);
always @* begin
case (x)
//0, 2: o = b; // Creates $reduce_or
//0: o = b; 2: o = b; // Creates $reduce_or
0: o = b;
2: o = f;
1: o = c;
default:
case (x)
//3, 4: o = d; // Creates $reduce_or
//3: o = d; 4: o = d; // Creates $reduce_or
3: o = d;
4: o = g;
5: o = e;
default: o = 1'b0;
endcase
endcase
end
endmodule
module case_overlap (
input wire [2:0] x,
input wire a, b, c, d, e, f, g,
output reg o
);
always @* begin
case (x)
//0, 2: o = b; // Creates $reduce_or
//0: o = b; 2: o = b; // Creates $reduce_or
0: o = b;
2: o = f;
1: o = c;
default:
case (x)
//3, 4: o = d; // Creates $reduce_or
//3: o = d; 4: o = d; // Creates $reduce_or
2: o = 1'b1; // Overlaps with previous $pmux
3: o = d;
4: o = g;
5: o = e;
default: o = 1'b0;
endcase
endcase
end
endmodule