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Custom step to add global clock buffers

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This commit is contained in:
Miodrag Milanovic 2019-08-03 14:40:23 +02:00
parent ab98f604fd
commit 6e210f26fa
4 changed files with 129 additions and 1 deletions
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10
techlibs/efinix/cells_sim.v
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@ -33,4 +33,12 @@ module EFX_FF(
parameter SR_VALUE = 0;
parameter SR_SYNC_PRIORITY = 0;
parameter D_POLARITY = 1;
endmodule
endmodule
module EFX_GBUFCE (
input CE,
input I,
output O
);
parameter CE_POLARITY = 1'b1;
endmodule