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https://github.com/YosysHQ/yosys
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substr() -> compare()
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parent
71eff6f0de
commit
6d77236f38
31 changed files with 127 additions and 127 deletions
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@ -1164,7 +1164,7 @@ void AST::process(RTLIL::Design *design, AstNode *ast, bool dump_ast1, bool dump
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}
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}
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if (flag_icells && (*it)->str.substr(0, 2) == "\\$")
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if (flag_icells && (*it)->str.compare(0, 2, "\\$") == 0)
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(*it)->str = (*it)->str.substr(1);
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if (defer)
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@ -1463,7 +1463,7 @@ std::string AstModule::derive_common(RTLIL::Design *design, dict<RTLIL::IdString
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{
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std::string stripped_name = name.str();
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if (stripped_name.substr(0, 9) == "$abstract")
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if (stripped_name.compare(0, 9, "$abstract") == 0)
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stripped_name = stripped_name.substr(9);
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log_header(design, "Executing AST frontend in derive mode using pre-parsed AST for module `%s'.\n", stripped_name.c_str());
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@ -1516,7 +1516,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint)
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AstNode *child = *it;
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if (child->type == AST_CELLTYPE) {
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cell->type = child->str;
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if (flag_icells && cell->type.substr(0, 2) == "\\$")
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if (flag_icells && cell->type.begins_with("\\$"))
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cell->type = cell->type.substr(1);
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continue;
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}
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@ -2793,13 +2793,13 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
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std::getline(f, line);
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for (int i = 0; i < GetSize(line); i++) {
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if (in_comment && line.substr(i, 2) == "*/") {
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if (in_comment && line.compare(i, 2, "*/") == 0) {
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line[i] = ' ';
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line[i+1] = ' ';
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in_comment = false;
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continue;
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}
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if (!in_comment && line.substr(i, 2) == "/*")
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if (!in_comment && line.compare(i, 2, "/*") == 0)
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in_comment = true;
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if (in_comment)
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line[i] = ' ';
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@ -2808,7 +2808,7 @@ AstNode *AstNode::readmem(bool is_readmemh, std::string mem_filename, AstNode *m
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while (1)
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{
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token = next_token(line, " \t\r\n");
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if (token.empty() || token.substr(0, 2) == "//")
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if (token.empty() || token.compare(0, 2, "//") == 0)
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break;
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if (token[0] == '@') {
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@ -2140,7 +2140,7 @@ struct VerificPass : public Pass {
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veri_file::DefineMacro("VERIFIC");
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veri_file::DefineMacro(args[argidx] == "-formal" ? "FORMAL" : "SYNTHESIS");
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for (argidx++; argidx < GetSize(args) && GetSize(args[argidx]) >= 2 && args[argidx].substr(0, 2) == "-D"; argidx++) {
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for (argidx++; argidx < GetSize(args) && GetSize(args[argidx]) >= 2 && args[argidx].compare(0, 2, "-D") == 0; argidx++) {
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std::string name = args[argidx].substr(2);
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if (args[argidx] == "-D") {
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if (++argidx >= GetSize(args))
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@ -2283,7 +2283,7 @@ struct VerificPass : public Pass {
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break;
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}
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if (argidx > GetSize(args) && args[argidx].substr(0, 1) == "-")
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if (argidx > GetSize(args) && args[argidx].compare(0, 1, "-") == 0)
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cmd_error(args, argidx, "unknown option");
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if (mode_all)
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@ -274,7 +274,7 @@ hierarchical_id:
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$$ = $1;
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} |
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hierarchical_id TOK_PACKAGESEP TOK_ID {
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if ($3->substr(0, 1) == "\\")
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if ($3->compare(0, 1, "\\") == 0)
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*$1 += "::" + $3->substr(1);
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else
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*$1 += "::" + *$3;
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@ -282,7 +282,7 @@ hierarchical_id:
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$$ = $1;
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} |
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hierarchical_id '.' TOK_ID {
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if ($3->substr(0, 1) == "\\")
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if ($3->compare(0, 1, "\\") == 0)
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*$1 += "." + $3->substr(1);
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else
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*$1 += "." + *$3;
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@ -2184,7 +2184,7 @@ basic_expr:
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$$ = $1;
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} |
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'(' expr ')' TOK_CONSTVAL {
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if ($4->substr(0, 1) != "'")
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if ($4->compare(0, 1, "'") != 0)
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frontend_verilog_yyerror("Cast operation must be applied on sized constants e.g. (<expr>)<constval> , while %s is not a sized constant.", $4->c_str());
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AstNode *bits = $2;
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AstNode *val = const2ast(*$4, case_type_stack.size() == 0 ? 0 : case_type_stack.back(), !lib_mode);
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@ -2194,7 +2194,7 @@ basic_expr:
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delete $4;
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} |
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hierarchical_id TOK_CONSTVAL {
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if ($2->substr(0, 1) != "'")
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if ($2->compare(0, 1, "'") != 0)
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frontend_verilog_yyerror("Cast operation must be applied on sized constants, e.g. <ID>\'d0, while %s is not a sized constant.", $2->c_str());
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AstNode *bits = new AstNode(AST_IDENTIFIER);
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bits->str = *$1;
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