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	opt_expr: Remove -clkinv option, make it the default.
Adds -noclkinv option just in case the old behavior was actually useful to someone.
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					 5 changed files with 17 additions and 18 deletions
				
			
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					@ -37,7 +37,7 @@ struct OptPass : public Pass {
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		log("a series of trivial optimizations and cleanups. This pass executes the other\n");
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							log("a series of trivial optimizations and cleanups. This pass executes the other\n");
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		log("passes in the following order:\n");
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							log("passes in the following order:\n");
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		log("\n");
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							log("\n");
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		log("    opt_expr [-mux_undef] [-mux_bool] [-undriven] [-clkinv] [-fine] [-full] [-keepdc]\n");
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							log("    opt_expr [-mux_undef] [-mux_bool] [-undriven] [-noclkinv] [-fine] [-full] [-keepdc]\n");
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		log("    opt_merge [-share_all] -nomux\n");
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							log("    opt_merge [-share_all] -nomux\n");
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		log("\n");
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							log("\n");
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		log("    do\n");
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							log("    do\n");
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					@ -47,13 +47,13 @@ struct OptPass : public Pass {
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		log("        opt_share  (-full only)\n");
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							log("        opt_share  (-full only)\n");
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		log("        opt_rmdff [-keepdc] [-sat]  (except when called with -noff)\n");
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							log("        opt_rmdff [-keepdc] [-sat]  (except when called with -noff)\n");
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		log("        opt_clean [-purge]\n");
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							log("        opt_clean [-purge]\n");
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		log("        opt_expr [-mux_undef] [-mux_bool] [-undriven] [-clkinv] [-fine] [-full] [-keepdc]\n");
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							log("        opt_expr [-mux_undef] [-mux_bool] [-undriven] [-noclkinv] [-fine] [-full] [-keepdc]\n");
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		log("    while <changed design>\n");
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							log("    while <changed design>\n");
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		log("\n");
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							log("\n");
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		log("When called with -fast the following script is used instead:\n");
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							log("When called with -fast the following script is used instead:\n");
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		log("\n");
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							log("\n");
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		log("    do\n");
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							log("    do\n");
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		log("        opt_expr [-mux_undef] [-mux_bool] [-undriven] [-clkinv] [-fine] [-full] [-keepdc]\n");
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							log("        opt_expr [-mux_undef] [-mux_bool] [-undriven] [-noclkinv] [-fine] [-full] [-keepdc]\n");
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		log("        opt_merge [-share_all]\n");
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							log("        opt_merge [-share_all]\n");
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		log("        opt_rmdff [-keepdc] [-sat]  (except when called with -noff)\n");
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							log("        opt_rmdff [-keepdc] [-sat]  (except when called with -noff)\n");
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		log("        opt_clean [-purge]\n");
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							log("        opt_clean [-purge]\n");
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					@ -96,8 +96,8 @@ struct OptPass : public Pass {
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				opt_expr_args += " -undriven";
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									opt_expr_args += " -undriven";
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				continue;
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									continue;
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			}
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								}
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			if (args[argidx] == "-clkinv") {
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								if (args[argidx] == "-noclkinv") {
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				opt_expr_args += " -clkinv";
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									opt_expr_args += " -noclkinv";
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				continue;
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									continue;
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			}
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								}
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			if (args[argidx] == "-fine") {
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								if (args[argidx] == "-fine") {
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					@ -416,7 +416,7 @@ int get_onehot_bit_index(RTLIL::SigSpec signal)
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	return bit_index;
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						return bit_index;
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}
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					}
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void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool consume_x, bool mux_undef, bool mux_bool, bool do_fine, bool keepdc, bool clkinv)
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					void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool consume_x, bool mux_undef, bool mux_bool, bool do_fine, bool keepdc, bool noclkinv)
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{
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					{
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	if (!design->selected(module))
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						if (!design->selected(module))
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		return;
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							return;
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					@ -465,7 +465,7 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
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#define ACTION_DO(_p_, _s_) do { cover("opt.opt_expr.action_" S__LINE__); replace_cell(assign_map, module, cell, input.as_string(), _p_, _s_); goto next_cell; } while (0)
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					#define ACTION_DO(_p_, _s_) do { cover("opt.opt_expr.action_" S__LINE__); replace_cell(assign_map, module, cell, input.as_string(), _p_, _s_); goto next_cell; } while (0)
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#define ACTION_DO_Y(_v_) ACTION_DO(ID::Y, RTLIL::SigSpec(RTLIL::State::S ## _v_))
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					#define ACTION_DO_Y(_v_) ACTION_DO(ID::Y, RTLIL::SigSpec(RTLIL::State::S ## _v_))
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		if (clkinv)
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							if (!noclkinv)
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		{
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							{
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			if (cell->type.in(ID($dff), ID($dffe), ID($dffsr), ID($dffsre), ID($adff), ID($adffe), ID($sdff), ID($sdffe), ID($sdffce), ID($fsm), ID($memrd), ID($memwr)))
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								if (cell->type.in(ID($dff), ID($dffe), ID($dffsr), ID($dffsre), ID($adff), ID($adffe), ID($sdff), ID($sdffe), ID($sdffce), ID($fsm), ID($memrd), ID($memwr)))
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				handle_polarity_inv(cell, ID::CLK, ID::CLK_POLARITY, assign_map, invert_map);
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									handle_polarity_inv(cell, ID::CLK, ID::CLK_POLARITY, assign_map, invert_map);
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					@ -2064,8 +2064,8 @@ struct OptExprPass : public Pass {
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		log("    -undriven\n");
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							log("    -undriven\n");
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		log("        replace undriven nets with undef (x) constants\n");
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							log("        replace undriven nets with undef (x) constants\n");
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		log("\n");
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							log("\n");
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		log("    -clkinv\n");
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							log("    -noclkinv\n");
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		log("        optimize clock inverters by changing FF types\n");
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							log("        do not optimize clock inverters by changing FF types\n");
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		log("\n");
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							log("\n");
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		log("    -fine\n");
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							log("    -fine\n");
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		log("        perform fine-grain optimizations\n");
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							log("        perform fine-grain optimizations\n");
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					@ -2085,7 +2085,7 @@ struct OptExprPass : public Pass {
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		bool mux_undef = false;
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							bool mux_undef = false;
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		bool mux_bool = false;
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							bool mux_bool = false;
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		bool undriven = false;
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							bool undriven = false;
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		bool clkinv = false;
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							bool noclkinv = false;
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		bool do_fine = false;
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							bool do_fine = false;
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		bool keepdc = false;
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							bool keepdc = false;
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					@ -2106,8 +2106,8 @@ struct OptExprPass : public Pass {
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				undriven = true;
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									undriven = true;
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				continue;
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									continue;
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			}
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								}
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			if (args[argidx] == "-clkinv") {
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								if (args[argidx] == "-noclkinv") {
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				clkinv = true;
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									noclkinv = true;
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				continue;
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									continue;
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			}
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								}
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			if (args[argidx] == "-fine") {
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								if (args[argidx] == "-fine") {
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					@ -2144,12 +2144,12 @@ struct OptExprPass : public Pass {
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			do {
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								do {
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				do {
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									do {
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					did_something = false;
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										did_something = false;
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					replace_const_cells(design, module, false /* consume_x */, mux_undef, mux_bool, do_fine, keepdc, clkinv);
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										replace_const_cells(design, module, false /* consume_x */, mux_undef, mux_bool, do_fine, keepdc, noclkinv);
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					if (did_something)
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										if (did_something)
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						design->scratchpad_set_bool("opt.did_something", true);
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											design->scratchpad_set_bool("opt.did_something", true);
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				} while (did_something);
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									} while (did_something);
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				if (!keepdc)
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									if (!keepdc)
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					replace_const_cells(design, module, true /* consume_x */, mux_undef, mux_bool, do_fine, keepdc, clkinv);
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										replace_const_cells(design, module, true /* consume_x */, mux_undef, mux_bool, do_fine, keepdc, noclkinv);
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				if (did_something)
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									if (did_something)
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					design->scratchpad_set_bool("opt.did_something", true);
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										design->scratchpad_set_bool("opt.did_something", true);
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			} while (did_something);
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								} while (did_something);
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					@ -162,7 +162,7 @@ struct SynthGreenPAK4Pass : public ScriptPass
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			run("opt -undriven -fine");
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								run("opt -undriven -fine");
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			run("techmap -map +/techmap.v -map +/greenpak4/cells_latch.v");
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								run("techmap -map +/techmap.v -map +/greenpak4/cells_latch.v");
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			run("dfflibmap -prepare -liberty +/greenpak4/gp_dff.lib");
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								run("dfflibmap -prepare -liberty +/greenpak4/gp_dff.lib");
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			run("opt -fast");
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								run("opt -fast -noclkinv -noff");
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			if (retime || help_mode)
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								if (retime || help_mode)
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				run("abc -dff -D 1", "(only if -retime)");
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									run("abc -dff -D 1", "(only if -retime)");
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		}
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							}
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					@ -585,7 +585,7 @@ struct SynthXilinxPass : public ScriptPass
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		}
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							}
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		if (check_label("map_luts")) {
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							if (check_label("map_luts")) {
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			run("opt_expr -mux_undef");
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								run("opt_expr -mux_undef -noclkinv");
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			if (flatten_before_abc)
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								if (flatten_before_abc)
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				run("flatten");
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									run("flatten");
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			if (help_mode)
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								if (help_mode)
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					@ -18,9 +18,8 @@ equiv_opt -async2sync -assert -map +/xilinx/cells_sim.v synth_xilinx -noiopad #
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design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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					design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
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cd latchn # Constrain all select calls below inside the top module
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					cd latchn # Constrain all select calls below inside the top module
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select -assert-count 1 t:LDCE
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					select -assert-count 1 t:LDCE
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select -assert-count 1 t:INV
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select -assert-none t:LDCE t:INV %% t:* %D
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					select -assert-none t:LDCE %% t:* %D
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design -load read
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					design -load read
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