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https://github.com/YosysHQ/yosys
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Documentation for JSON format, added attributes
This commit is contained in:
Clifford Wolf
parent
42d5d94a5d
commit
6c8fdb1829
1 changed files with 156 additions and 16 deletions
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@ -79,6 +79,22 @@ struct JsonWriter
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return str + " ]";
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}
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void write_parameters(const dict<IdString, Const> ¶meters)
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{
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bool first = true;
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for (auto ¶m : parameters) {
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f << stringf("%s\n", first ? "" : ",");
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f << stringf(" %s: ", get_name(param.first).c_str());
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if ((param.second.flags & RTLIL::ConstFlags::CONST_FLAG_STRING) != 0)
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f << get_string(param.second.decode_string());
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else if (GetSize(param.second.bits) > 32)
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f << get_string(param.second.as_string());
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else
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f << stringf("%d", param.second.as_int());
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first = false;
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}
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}
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void write_module(Module *module_)
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{
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module = module_;
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@ -116,21 +132,13 @@ struct JsonWriter
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f << stringf(" \"hide_name\": %s,\n", c->name[0] == '$' ? "1" : "0");
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f << stringf(" \"type\": %s,\n", get_name(c->type).c_str());
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f << stringf(" \"parameters\": {");
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bool first2 = true;
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for (auto ¶m : c->parameters) {
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f << stringf("%s\n", first2 ? "" : ",");
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f << stringf(" %s: ", get_name(param.first).c_str());
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if ((param.second.flags & RTLIL::ConstFlags::CONST_FLAG_STRING) != 0)
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f << get_string(param.second.decode_string());
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else if (GetSize(param.second.bits) > 32)
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f << get_string(param.second.as_string());
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else
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f << stringf("%d", param.second.as_int());
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first2 = false;
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}
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write_parameters(c->parameters);
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f << stringf("\n },\n");
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f << stringf(" \"attributes\": {");
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write_parameters(c->attributes);
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f << stringf("\n },\n");
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f << stringf(" \"connections\": {");
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first2 = true;
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bool first2 = true;
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for (auto &conn : c->connections()) {
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f << stringf("%s\n", first2 ? "" : ",");
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f << stringf(" %s: %s", get_name(conn.first).c_str(), get_bits(conn.second).c_str());
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@ -150,7 +158,10 @@ struct JsonWriter
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f << stringf("%s\n", first ? "" : ",");
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f << stringf(" %s: {\n", get_name(w->name).c_str());
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f << stringf(" \"hide_name\": %s,\n", w->name[0] == '$' ? "1" : "0");
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f << stringf(" \"bits\": %s\n", get_bits(w).c_str());
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f << stringf(" \"bits\": %s,\n", get_bits(w).c_str());
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f << stringf(" \"attributes\": {");
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write_parameters(w->attributes);
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f << stringf("\n }\n");
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f << stringf(" }");
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first = false;
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}
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@ -188,6 +199,133 @@ struct JsonBackend : public Backend {
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log("\n");
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log("Write a JSON netlist of the current design.\n");
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log("\n");
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log("The general syntax of the JSON output created by this command is as follows:\n");
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log("\n");
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log(" {\n");
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log(" \"modules\": {\n");
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log(" <module_name>: {\n");
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log(" \"ports\": {\n");
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log(" <port_name>: <port_details>,\n");
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log(" ...\n");
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log(" },\n");
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log(" \"cells\": {\n");
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log(" <cell_name>: <cell_details>,\n");
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log(" ...\n");
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log(" },\n");
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log(" \"netnames\": {\n");
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log(" <net_name>: <net_details>,\n");
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log(" ...\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log("\n");
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log("Where <port_details> is:\n");
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log("\n");
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log(" {\n");
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log(" \"direction\": <\"input\" | \"output\" | \"inout\">,\n");
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log(" \"bits\": <bit_vector>\n");
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log(" }\n");
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log("\n");
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log("And <cell_details> is:\n");
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log("\n");
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log(" {\n");
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log(" \"hide_name\": <1 | 0>,\n");
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log(" \"type\": <cell_type>,\n");
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log(" \"parameters\": {\n");
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log(" <parameter_name>: <parameter_value>,\n");
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log(" ...\n");
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log(" },\n");
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log(" \"attributes\": {\n");
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log(" <attribute_name>: <attribute_value>,\n");
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log(" ...\n");
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log(" },\n");
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log(" \"connections\": {\n");
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log(" <port_name>: <bit_vector>,\n");
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log(" ...\n");
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log(" },\n");
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log(" }\n");
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log("\n");
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log("And <net_details> is:\n");
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log("\n");
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log(" {\n");
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log(" \"hide_name\": <1 | 0>,\n");
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log(" \"bits\": <bit_vector>\n");
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log(" }\n");
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log("\n");
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log("The \"hide_name\" fields are set to 1 when the name of this cell or net is\n");
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log("automatically created and is likely not of interest for a regular user.\n");
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log("\n");
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log("Module and cell ports and nets can be single bit wide or vectors of multiple\n");
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log("bits. Each individual signal bit is assigned a unique integer. The <bit_vector>\n");
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log("values referenced above are vectors of this integers. Signal bits that are\n");
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log("connected to a constant driver are denoted as string \"0\" or \"1\" instead of\n");
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log("a number.\n");
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log("\n");
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log("For example the following verilog code:\n");
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log("\n");
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log(" module test(input x, y);\n");
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log(" (* keep *) foo #(.P(42), .Q(1337))\n");
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log(" foo_inst (.A({x, y}), .B({y, x}), .C({4'd10, {4{x}}}));\n");
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log(" endmodule\n");
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log("\n");
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log("Translates to the following JSON output:\n");
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log("\n");
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log(" {\n");
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log(" \"modules\": {\n");
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log(" \"test\": {\n");
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log(" \"ports\": {\n");
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log(" \"x\": {\n");
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log(" \"direction\": \"input\",\n");
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log(" \"bits\": [ 2 ]\n");
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log(" },\n");
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log(" \"y\": {\n");
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log(" \"direction\": \"input\",\n");
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log(" \"bits\": [ 3 ]\n");
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log(" }\n");
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log(" },\n");
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log(" \"cells\": {\n");
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log(" \"foo_inst\": {\n");
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log(" \"hide_name\": 0,\n");
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log(" \"type\": \"foo\",\n");
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log(" \"parameters\": {\n");
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log(" \"Q\": 1337,\n");
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log(" \"P\": 42\n");
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log(" },\n");
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log(" \"attributes\": {\n");
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log(" \"keep\": 1,\n");
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log(" \"src\": \"test.v:2\"\n");
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log(" },\n");
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log(" \"connections\": {\n");
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log(" \"C\": [ 2, 2, 2, 2, \"0\", \"1\", \"0\", \"1\" ],\n");
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log(" \"B\": [ 2, 3 ],\n");
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log(" \"A\": [ 3, 2 ]\n");
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log(" }\n");
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log(" }\n");
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log(" },\n");
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log(" \"netnames\": {\n");
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log(" \"y\": {\n");
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log(" \"hide_name\": 0,\n");
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log(" \"bits\": [ 3 ],\n");
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log(" \"attributes\": {\n");
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log(" \"src\": \"test.v:1\"\n");
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log(" }\n");
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log(" },\n");
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log(" \"x\": {\n");
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log(" \"hide_name\": 0,\n");
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log(" \"bits\": [ 2 ],\n");
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log(" \"attributes\": {\n");
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log(" \"src\": \"test.v:1\"\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log(" }\n");
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log("\n");
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log("Future version of Yosys might add support for additional fields in the JSON\n");
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log("format. A program processing this format must ignore all unkown fields.\n");
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log("\n");
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}
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virtual void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
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{
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@ -210,18 +348,20 @@ struct JsonBackend : public Backend {
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} JsonBackend;
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struct JsonPass : public Pass {
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JsonPass() : Pass("json", "write design to a JSON file") { }
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JsonPass() : Pass("json", "write design in JSON format") { }
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virtual void help()
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" write_json [options] [selection]\n");
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log(" json [options] [selection]\n");
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log("\n");
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log("Write a JSON netlist of all selected objects.\n");
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log("\n");
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log(" -o <filename>\n");
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log(" write to the specified file.\n");
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log("\n");
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log("See 'help write_json' for a description of the JSON format used.\n");
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log("\n");
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}
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virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
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{
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