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Fixed trailing whitespaces

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This commit is contained in:
Clifford Wolf 2015-07-02 11:14:30 +02:00
parent 053058d781
commit 6c84341f22
195 changed files with 729 additions and 729 deletions
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4
libs/subcircuit/README
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@ -330,7 +330,7 @@ Mining for frequent SubCircuits
The solver also contains a miner for frequent subcircuits. The following code
fragment will find all frequent subcircuits with at least minNodes nodes and
at most maxNodes nodes that occurs at least minMatches times:
at most maxNodes nodes that occurs at least minMatches times:
std::vector<SubCircuit::Solver::MineResult> results;
mySolver.mine(results, minNodes, maxNodes, minMatches);
@ -370,7 +370,7 @@ This package also contains a small command-line tool called "scshell" that can
be used for experimentation with the algorithm. This program reads a series of
commands from stdin and reports its findings to stdout on exit.
$ ./scshell < test_macc22.txt
$ ./scshell < test_macc22.txt
...

4
libs/subcircuit/subcircuit.cc
View file

@ -3,11 +3,11 @@
* algorithm for coarse grain logic networks
*
* Copyright (C) 2013 Clifford Wolf <clifford@clifford.at>
*
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR

6
libs/subcircuit/subcircuit.h
View file

@ -3,11 +3,11 @@
* algorithm for coarse grain logic networks
*
* Copyright (C) 2013 Clifford Wolf <clifford@clifford.at>
*
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
@ -115,7 +115,7 @@ namespace SubCircuit
private:
SolverWorker *worker;
protected:
virtual bool userCompareNodes(const std::string &needleGraphId, const std::string &needleNodeId, void *needleUserData,
const std::string &haystackGraphId, const std::string &haystackNodeId, void *haystackUserData, const std::map<std::string, std::string> &portMapping);

2
libs/subcircuit/test_large.spl
View file

@ -99,7 +99,7 @@ function makeGraph(seed, gates, primaryInputs, primaryOutputs)
foreach netDecl (unusedOutpus)
push primaryOutputs, netDecl;
return code;
}