3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-08 04:01:25 +00:00

xilinx/ice40/ecp5: zinit requires selected wires, so select them all

This commit is contained in:
Eddie Hung 2020-04-21 15:45:05 -07:00
parent b65610fb62
commit 6c34945371
3 changed files with 4 additions and 4 deletions

View file

@ -316,7 +316,7 @@ struct SynthEcp5Pass : public ScriptPass
if (!nodffe)
run("dff2dffe -direct-match $_DFF_* -direct-match $__DFFS_*");
if ((abc9 && dff) || help_mode)
run("zinit -all t:$_DFF_?_ t:$_DFFE_??_ t:$__DFFS*", "(only if -abc9 and -dff");
run("zinit -all w:* t:$_DFF_?_ t:$_DFFE_??_ t:$__DFFS*", "(only if -abc9 and -dff");
run(stringf("techmap -D NO_LUT %s -map +/ecp5/cells_map.v", help_mode ? "[-D ASYNC_PRLD]" : (asyncprld ? "-D ASYNC_PRLD" : "")));
run("opt_expr -undriven -mux_undef");
run("simplemap");