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Code Activity

Merge remote-tracking branch 'origin/xaig' into xc7mux

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This commit is contained in:
Eddie Hung 2019-06-21 17:44:21 -07:00
commit 6c2cb51996
9 changed files with 158 additions and 9 deletions
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@ -16,16 +16,17 @@ Yosys 0.8 .. Yosys 0.8-dev
- Added "gate2lut.v" techmap rule
- Added "rename -src"
- Added "equiv_opt" pass
- Added "shregmap -tech xilinx"
- Added "read_aiger" frontend
- Added "shregmap -tech xilinx"
- "synth_xilinx" to now infer hard shift registers (-nosrl to disable)
- Added "abc9" pass for timing-aware techmapping (experimental, FPGA only, no FFs)
- Added "synth_xilinx -abc9" (experimental)
- Added "synth_ice40 -abc9" (experimental)
- Added "synth -abc9" (experimental)
- Added "muxpack" pass
- Extended "muxcover -mux{4,8,16}=<cost>"
- Fixed sign extension of unsized constants with 'bx and 'bz MSB
- Added "muxpack" pass
- "synth_xilinx" to now infer hard shift registers (-nosrl to disable)
- "synth_xilinx" to now infer wide multiplexers (-nomux to disable)