diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 1d380135b..f42f5430f 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -1528,7 +1528,7 @@ std::vector<RTLIL::Wire*> RTLIL::Module::selected_wires() const
 std::vector<RTLIL::Cell*> RTLIL::Module::selected_cells() const
 {
 	std::vector<RTLIL::Cell*> result;
-	result.reserve(wires_.size());
+	result.reserve(cells_.size());
 	for (auto &it : cells_)
 		if (design->selected(this, it.second))
 			result.push_back(it.second);