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	Replaced more old SigChunk programming patterns
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					 17 changed files with 101 additions and 104 deletions
				
			
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			@ -35,10 +35,8 @@ struct BitPatternPool
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		if (width > 0) {
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			std::vector<RTLIL::State> pattern(width);
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			for (int i = 0; i < width; i++) {
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				RTLIL::SigSpec s = sig.extract(i, 1);
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				assert(s.chunks().size() == 1);
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				if (s.chunks()[0].wire == NULL && s.chunks()[0].data.bits[0] <= RTLIL::State::S1)
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					pattern[i] = s.chunks()[0].data.bits[0];
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				if (sig[i].wire == NULL && sig[i].data <= RTLIL::State::S1)
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					pattern[i] = sig[i].data;
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				else
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					pattern[i] = RTLIL::State::Sa;
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			}
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			@ -59,9 +57,7 @@ struct BitPatternPool
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	bits_t sig2bits(RTLIL::SigSpec sig)
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	{
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		assert(sig.is_fully_const());
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		assert(sig.chunks().size() == 1);
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		bits_t bits = sig.chunks()[0].data.bits;
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		bits_t bits = sig.as_const().bits;
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		for (auto &b : bits)
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			if (b > RTLIL::State::S1)
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				b = RTLIL::State::Sa;
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