From 68c11321c02ccccd34f16305c9aef22ac232ece3 Mon Sep 17 00:00:00 2001 From: "Emil J. Tywoniak" Date: Wed, 7 May 2025 17:52:31 +0200 Subject: [PATCH] remove invalid tests --- tests/simple_abc9/abc9.v | 102 +++++++++++++++++++-------------------- 1 file changed, 51 insertions(+), 51 deletions(-) diff --git a/tests/simple_abc9/abc9.v b/tests/simple_abc9/abc9.v index fba089b1f..f1a239832 100644 --- a/tests/simple_abc9/abc9.v +++ b/tests/simple_abc9/abc9.v @@ -47,63 +47,63 @@ module abc9_test008_sub(input a, output b); assign b = ~a; endmodule -module abc9_test009(inout io, input oe); -reg latch; -always @(io or oe) - if (!oe) - latch <= io; -assign io = oe ? ~latch : 1'bz; -endmodule +// module abc9_test009(inout io, input oe); +// reg latch; +// always @(io or oe) +// if (!oe) +// latch <= io; +// assign io = oe ? ~latch : 1'bz; +// endmodule -module abc9_test010(inout [7:0] io, input oe); -reg [7:0] latch; -always @(io or oe) - if (!oe) - latch <= io; -assign io = oe ? ~latch : 8'bz; -endmodule +// module abc9_test010(inout [7:0] io, input oe); +// reg [7:0] latch; +// always @(io or oe) +// if (!oe) +// latch <= io; +// assign io = oe ? ~latch : 8'bz; +// endmodule -module abc9_test011(inout io, input oe); -reg latch; -always @(io or oe) - if (!oe) - latch <= io; -//assign io = oe ? ~latch : 8'bz; -endmodule +// module abc9_test011(inout io, input oe); +// reg latch; +// always @(io or oe) +// if (!oe) +// latch <= io; +// //assign io = oe ? ~latch : 8'bz; +// endmodule -module abc9_test012(inout io, input oe); -reg latch; -//always @(io or oe) -// if (!oe) -// latch <= io; -assign io = oe ? ~latch : 8'bz; -endmodule +// module abc9_test012(inout io, input oe); +// reg latch; +// //always @(io or oe) +// // if (!oe) +// // latch <= io; +// assign io = oe ? ~latch : 8'bz; +// endmodule -module abc9_test013(inout [3:0] io, input oe); -reg [3:0] latch; -always @(io or oe) - if (!oe) - latch[3:0] <= io[3:0]; - else - latch[7:4] <= io; -assign io[3:0] = oe ? ~latch[3:0] : 4'bz; -assign io[7:4] = !oe ? {latch[4], latch[7:3]} : 4'bz; -endmodule +// // module abc9_test013(inout [3:0] io, input oe); +// // reg [7:0] latch; +// // always @(io or oe) +// // if (!oe) +// // latch[3:0] <= io[3:0]; +// // else +// // latch[7:4] <= io; +// // assign io[3:0] = oe ? ~latch[3:0] : 4'bz; +// // assign io[7:4] = !oe ? {latch[4], latch[7:3]} : 4'bz; +// // endmodule -module abc9_test014(inout [7:0] io, input oe); -abc9_test012_sub sub(io, oe); -endmodule +// module abc9_test014(inout [7:0] io, input oe); +// abc9_test012_sub sub(io, oe); +// endmodule -module abc9_test012_sub(inout [7:0] io, input oe); -reg [7:0] latch; -always @(io or oe) - if (!oe) - latch[3:0] <= io; - else - latch[7:4] <= io; -assign io[3:0] = oe ? ~latch[3:0] : 4'bz; -assign io[7:4] = !oe ? {latch[4], latch[7:3]} : 4'bz; -endmodule +// module abc9_test012_sub(inout [7:0] io, input oe); +// reg [7:0] latch; +// always @(io or oe) +// if (!oe) +// latch[3:0] <= io; +// else +// latch[7:4] <= io; +// assign io[3:0] = oe ? ~latch[3:0] : 4'bz; +// assign io[7:4] = !oe ? {latch[4], latch[7:3]} : 4'bz; +// endmodule module abc9_test015(input a, output b, input c); assign b = ~a;