From f62a9be15352d000228584bcb1984030dbefe6e4 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Sun, 2 Mar 2025 12:24:57 -0500 Subject: [PATCH 1/8] Initial file list support --- frontends/verilog/verilog_frontend.cc | 76 +++++++++++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index d363d71fb..5328ad404 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -26,6 +26,8 @@ * */ +#include + #include "verilog_frontend.h" #include "preproc.h" #include "kernel/yosys.h" @@ -672,6 +674,80 @@ struct VerilogDefines : public Pass { } } VerilogDefines; +struct VerilogFilelist : public Pass { + VerilogFilelist() : Pass("verilog_filelist", "use filelist") {} + void help() override + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" verilog_filelist [options]\n"); + log("\n"); + log("Load a Verilog file list, and pass list of Verilog files to read_verilog command.\n"); + log("\n"); + log(" -Fflist\n"); + log(" File list file contains list of Verilog to be parsed, any\n"); + log(" ' path is relative to the file list file'\n"); + log("\n"); + log(" -Fflist\n"); + log(" File list file contains list of Verilog to be parsed, any\n"); + log(" ' path is relative to current working directroy'\n"); + log("\n"); + } + + void parse_flist_rel_filelist(const std::string &flist_path, RTLIL::Design *design) + { + std::ifstream ifs(flist_path); + if (!ifs.is_open()) { + log_error("file list file does not exist"); + exit(1); + } + + std::filesystem::path flist_parent_dir = std::filesystem::path(flist_path).parent_path(); + + std::string v_file_name; + while (std::getline(ifs, v_file_name)) { + if (v_file_name.empty()) { + continue; + } + std::string v_file_path = flist_parent_dir.string() + '/' + v_file_name; + log("Verilog file %s\n", v_file_path.c_str()); + + bool is_sv = (std::filesystem::path(v_file_path).extension() == ".sv"); + + std::string command = "read_verilog"; + if (is_sv) { + command += " -sv"; + } + command = command + ' ' + v_file_path; + Pass::call(design, command); + } + } + + void parse_flist_rel_pwd(const std::string &flist_path, RTLIL::Design *design) { log("pwd %s\n", flist_path.c_str()); } + + void execute(std::vector args, RTLIL::Design *design) override + { + size_t argidx; + for (argidx = 1; argidx < args.size(); argidx++) { + std::string arg = args[argidx]; + if (arg == "-F" && argidx + 1 < args.size()) { + std::string flist_path = args[++argidx]; + parse_flist_rel_filelist(flist_path, design); + continue; + } + if (arg == "-f" && argidx + 1 < args.size()) { + std::string flist_path = args[++argidx]; + parse_flist_rel_pwd(flist_path, design); + continue; + } + break; + } + + if (args.size() != argidx) + cmd_error(args, argidx, "Extra argument."); + } +} VerilogFilelist; + YOSYS_NAMESPACE_END // the yyerror function used by bison to report parser errors From 8f46f53f183b9e4cb7011b185ba0632efdf95514 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Sun, 2 Mar 2025 12:29:56 -0500 Subject: [PATCH 2/8] Add clangd cache to gitignore file --- .gitignore | 2 ++ 1 file changed, 2 insertions(+) diff --git a/.gitignore b/.gitignore index 5c3d8f4e9..3c209ff4f 100644 --- a/.gitignore +++ b/.gitignore @@ -7,6 +7,7 @@ *.gcno *~ __pycache__ +/.cache /.cproject /.project /.settings @@ -52,3 +53,4 @@ __pycache__ /venv /boost /ffi +/compile_commands.json From 0678c4dec97d0ad3d83220c75cee8d65f419a4f1 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Sun, 2 Mar 2025 21:07:00 -0500 Subject: [PATCH 3/8] Coding style update --- frontends/verilog/verilog_frontend.cc | 60 +++++++++++++++------------ 1 file changed, 33 insertions(+), 27 deletions(-) diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 5328ad404..d2cea3599 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -674,56 +674,61 @@ struct VerilogDefines : public Pass { } } VerilogDefines; -struct VerilogFilelist : public Pass { - VerilogFilelist() : Pass("verilog_filelist", "use filelist") {} +struct VerilogFileList : public Pass { + VerilogFileList() : Pass("read_verilog_file_list", "Parse a Verilog file list") {} void help() override { // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| log("\n"); - log(" verilog_filelist [options]\n"); + log(" read_verilog_file_list [options]\n"); log("\n"); - log("Load a Verilog file list, and pass list of Verilog files to read_verilog command.\n"); + log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog command.\n"); log("\n"); - log(" -Fflist\n"); - log(" File list file contains list of Verilog to be parsed, any\n"); - log(" ' path is relative to the file list file'\n"); + log(" -F file_list_path\n"); + log(" File list file contains list of Verilog files to be parsed, any\n"); + log(" ' path is treated relative to the file list file'\n"); log("\n"); - log(" -Fflist\n"); - log(" File list file contains list of Verilog to be parsed, any\n"); - log(" ' path is relative to current working directroy'\n"); + log(" -f file_list_path\n"); + log(" File list file contains list of Verilog files to be parsed, any\n"); + log(" ' path is treated relative to current working directroy'\n"); log("\n"); } - void parse_flist_rel_filelist(const std::string &flist_path, RTLIL::Design *design) + void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path) { - std::ifstream ifs(flist_path); - if (!ifs.is_open()) { - log_error("file list file does not exist"); + std::ifstream flist(file_list_path); + if (!flist.is_open()) { + log_error("Verilog file list file does not exist"); exit(1); } - std::filesystem::path flist_parent_dir = std::filesystem::path(flist_path).parent_path(); + std::filesystem::path file_list_parent_dir = std::filesystem::path(file_list_path).parent_path(); std::string v_file_name; - while (std::getline(ifs, v_file_name)) { + while (std::getline(flist, v_file_name)) { if (v_file_name.empty()) { continue; } - std::string v_file_path = flist_parent_dir.string() + '/' + v_file_name; - log("Verilog file %s\n", v_file_path.c_str()); - bool is_sv = (std::filesystem::path(v_file_path).extension() == ".sv"); + std::string verilog_file_path; + if (relative_to_file_list_path) { + verilog_file_path = file_list_parent_dir.string() + '/' + v_file_name; + } else { + verilog_file_path = std::filesystem::current_path().string() + '/' + v_file_name; + } + + bool is_sv = (std::filesystem::path(verilog_file_path).extension() == ".sv"); std::string command = "read_verilog"; if (is_sv) { command += " -sv"; } - command = command + ' ' + v_file_path; + command = command + ' ' + verilog_file_path; Pass::call(design, command); } - } - void parse_flist_rel_pwd(const std::string &flist_path, RTLIL::Design *design) { log("pwd %s\n", flist_path.c_str()); } + flist.close(); + } void execute(std::vector args, RTLIL::Design *design) override { @@ -731,20 +736,21 @@ struct VerilogFilelist : public Pass { for (argidx = 1; argidx < args.size(); argidx++) { std::string arg = args[argidx]; if (arg == "-F" && argidx + 1 < args.size()) { - std::string flist_path = args[++argidx]; - parse_flist_rel_filelist(flist_path, design); + std::string file_list_path = args[++argidx]; + parse_file_list(file_list_path, design, true); continue; } if (arg == "-f" && argidx + 1 < args.size()) { - std::string flist_path = args[++argidx]; - parse_flist_rel_pwd(flist_path, design); + std::string file_list_path = args[++argidx]; + parse_file_list(file_list_path, design, false); continue; } break; } - if (args.size() != argidx) + if (args.size() != argidx) { cmd_error(args, argidx, "Extra argument."); + } } } VerilogFilelist; From 8ec96ec8065bb42570ddc5ecd843331a31990032 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Fri, 7 Mar 2025 00:50:28 -0500 Subject: [PATCH 4/8] Address most comments --- .gitignore | 2 +- frontends/verilog/verilog_frontend.cc | 24 +++++++++++------------- 2 files changed, 12 insertions(+), 14 deletions(-) diff --git a/.gitignore b/.gitignore index 3c209ff4f..239ae742b 100644 --- a/.gitignore +++ b/.gitignore @@ -16,6 +16,7 @@ __pycache__ /qtcreator.config /qtcreator.creator /qtcreator.creator.user +/compile_commands.json /coverage.info /coverage_html /Makefile.conf @@ -53,4 +54,3 @@ __pycache__ /venv /boost /ffi -/compile_commands.json diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index d2cea3599..fd317bf22 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -686,11 +686,11 @@ struct VerilogFileList : public Pass { log("\n"); log(" -F file_list_path\n"); log(" File list file contains list of Verilog files to be parsed, any\n"); - log(" ' path is treated relative to the file list file'\n"); + log(" path is treated relative to the file list file\n"); log("\n"); log(" -f file_list_path\n"); log(" File list file contains list of Verilog files to be parsed, any\n"); - log(" ' path is treated relative to current working directroy'\n"); + log(" path is treated relative to current working directroy\n"); log("\n"); } @@ -710,21 +710,21 @@ struct VerilogFileList : public Pass { continue; } - std::string verilog_file_path; + std::filesystem::path verilog_file_path; if (relative_to_file_list_path) { - verilog_file_path = file_list_parent_dir.string() + '/' + v_file_name; + verilog_file_path = file_list_parent_dir / v_file_name; } else { - verilog_file_path = std::filesystem::current_path().string() + '/' + v_file_name; + verilog_file_path = std::filesystem::current_path() / v_file_name; } - bool is_sv = (std::filesystem::path(verilog_file_path).extension() == ".sv"); + bool is_sv = (verilog_file_path.extension() == ".sv"); - std::string command = "read_verilog"; + std::vector read_verilog_cmd = {"read_verilog", "-defer"}; if (is_sv) { - command += " -sv"; + read_verilog_cmd.push_back("-sv"); } - command = command + ' ' + verilog_file_path; - Pass::call(design, command); + read_verilog_cmd.push_back(verilog_file_path.string()); + Pass::call(design, read_verilog_cmd); } flist.close(); @@ -748,9 +748,7 @@ struct VerilogFileList : public Pass { break; } - if (args.size() != argidx) { - cmd_error(args, argidx, "Extra argument."); - } + extra_args(args, argidx, design); } } VerilogFilelist; From ac31bad6569306450a28d9cd0bdf52ed51aceb93 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Fri, 7 Mar 2025 00:57:39 -0500 Subject: [PATCH 5/8] Address all comments --- frontends/verilog/verilog_frontend.cc | 72 +++++++++++++-------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index fd317bf22..723f2d589 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -674,6 +674,42 @@ struct VerilogDefines : public Pass { } } VerilogDefines; +static void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path) +{ + std::ifstream flist(file_list_path); + if (!flist.is_open()) { + log_error("Verilog file list file does not exist"); + exit(1); + } + + std::filesystem::path file_list_parent_dir = std::filesystem::path(file_list_path).parent_path(); + + std::string v_file_name; + while (std::getline(flist, v_file_name)) { + if (v_file_name.empty()) { + continue; + } + + std::filesystem::path verilog_file_path; + if (relative_to_file_list_path) { + verilog_file_path = file_list_parent_dir / v_file_name; + } else { + verilog_file_path = std::filesystem::current_path() / v_file_name; + } + + bool is_sv = (verilog_file_path.extension() == ".sv"); + + std::vector read_verilog_cmd = {"read_verilog", "-defer"}; + if (is_sv) { + read_verilog_cmd.push_back("-sv"); + } + read_verilog_cmd.push_back(verilog_file_path.string()); + Pass::call(design, read_verilog_cmd); + } + + flist.close(); +} + struct VerilogFileList : public Pass { VerilogFileList() : Pass("read_verilog_file_list", "Parse a Verilog file list") {} void help() override @@ -694,42 +730,6 @@ struct VerilogFileList : public Pass { log("\n"); } - void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path) - { - std::ifstream flist(file_list_path); - if (!flist.is_open()) { - log_error("Verilog file list file does not exist"); - exit(1); - } - - std::filesystem::path file_list_parent_dir = std::filesystem::path(file_list_path).parent_path(); - - std::string v_file_name; - while (std::getline(flist, v_file_name)) { - if (v_file_name.empty()) { - continue; - } - - std::filesystem::path verilog_file_path; - if (relative_to_file_list_path) { - verilog_file_path = file_list_parent_dir / v_file_name; - } else { - verilog_file_path = std::filesystem::current_path() / v_file_name; - } - - bool is_sv = (verilog_file_path.extension() == ".sv"); - - std::vector read_verilog_cmd = {"read_verilog", "-defer"}; - if (is_sv) { - read_verilog_cmd.push_back("-sv"); - } - read_verilog_cmd.push_back(verilog_file_path.string()); - Pass::call(design, read_verilog_cmd); - } - - flist.close(); - } - void execute(std::vector args, RTLIL::Design *design) override { size_t argidx; From bf1eab565b0f843b9472794f0fbfeabaa49091f7 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Fri, 7 Mar 2025 20:20:27 -0500 Subject: [PATCH 6/8] Fix compile on WASI platform --- frontends/verilog/verilog_frontend.cc | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 723f2d589..737481743 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -26,7 +26,9 @@ * */ +#if !defined(__wasm) #include +#endif #include "verilog_frontend.h" #include "preproc.h" @@ -674,6 +676,8 @@ struct VerilogDefines : public Pass { } } VerilogDefines; +#if !defined(__wasm) + static void parse_file_list(const std::string &file_list_path, RTLIL::Design *design, bool relative_to_file_list_path) { std::ifstream flist(file_list_path); @@ -721,12 +725,10 @@ struct VerilogFileList : public Pass { log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog command.\n"); log("\n"); log(" -F file_list_path\n"); - log(" File list file contains list of Verilog files to be parsed, any\n"); - log(" path is treated relative to the file list file\n"); + log(" File list file contains list of Verilog files to be parsed, any path is treated relative to the file list file\n"); log("\n"); log(" -f file_list_path\n"); - log(" File list file contains list of Verilog files to be parsed, any\n"); - log(" path is treated relative to current working directroy\n"); + log(" File list file contains list of Verilog files to be parsed, any path is treated relative to current working directroy\n"); log("\n"); } @@ -752,6 +754,8 @@ struct VerilogFileList : public Pass { } } VerilogFilelist; +#endif + YOSYS_NAMESPACE_END // the yyerror function used by bison to report parser errors From 98eefc5d1adcf6aec1dce8877c2f4f0780fa085b Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Fri, 7 Mar 2025 20:44:21 -0500 Subject: [PATCH 7/8] Add file list support to read pass --- frontends/verific/verific.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index cdd0ed802..19f17b0ff 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -4298,7 +4298,7 @@ struct ReadPass : public Pass { log("\n"); log(" read {-f|-F} \n"); log("\n"); - log("Load and execute the specified command file. (Requires Verific.)\n"); + log("Load and execute the specified command file.\n"); log("Check verific command for more information about supported commands in file.\n"); log("\n"); log("\n"); @@ -4412,10 +4412,10 @@ struct ReadPass : public Pass { if (args[1] == "-f" || args[1] == "-F") { if (use_verific) { args[0] = "verific"; - Pass::call(design, args); } else { - cmd_error(args, 1, "This version of Yosys is built without Verific support.\n"); + args[0] = "read_verilog_file_list"; } + Pass::call(design, args); return; } From a5f34d04f8f3f9305c18bdfb79e13e59ac15ac39 Mon Sep 17 00:00:00 2001 From: Jason Xu <40355221+JasonBrave@users.noreply.github.com> Date: Tue, 11 Mar 2025 18:50:44 -0400 Subject: [PATCH 8/8] Address comments --- frontends/verific/verific.cc | 4 ++++ frontends/verilog/verilog_frontend.cc | 9 ++++++--- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/frontends/verific/verific.cc b/frontends/verific/verific.cc index 19f17b0ff..a320a6efd 100644 --- a/frontends/verific/verific.cc +++ b/frontends/verific/verific.cc @@ -4413,7 +4413,11 @@ struct ReadPass : public Pass { if (use_verific) { args[0] = "verific"; } else { +#if !defined(__wasm) args[0] = "read_verilog_file_list"; +#else + cmd_error(args, 1, "Command files are not supported on this platform.\n"); +#endif } Pass::call(design, args); return; diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 737481743..e4e705c39 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -722,13 +722,16 @@ struct VerilogFileList : public Pass { log("\n"); log(" read_verilog_file_list [options]\n"); log("\n"); - log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog command.\n"); + log("Parse a Verilog file list, and pass the list of Verilog files to read_verilog\n"); + log("command\n"); log("\n"); log(" -F file_list_path\n"); - log(" File list file contains list of Verilog files to be parsed, any path is treated relative to the file list file\n"); + log(" File list file contains list of Verilog files to be parsed, any path is\n"); + log(" treated relative to the file list file\n"); log("\n"); log(" -f file_list_path\n"); - log(" File list file contains list of Verilog files to be parsed, any path is treated relative to current working directroy\n"); + log(" File list file contains list of Verilog files to be parsed, any path is\n"); + log(" treated relative to current working directroy\n"); log("\n"); }