mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-28 03:15:50 +00:00
Code Activity

Merge remote-tracking branch 'origin/eddie/opt_rmdff' into xc7mux

Browse source
This commit is contained in:
Eddie Hung 2019-05-23 13:37:53 -07:00
commit 68359bcd6f
8 changed files with 120 additions and 20 deletions
Download patch file Download diff file Expand all files Collapse all files

10
passes/opt/wreduce.cc
View file

@ -29,6 +29,7 @@ PRIVATE_NAMESPACE_BEGIN
struct WreduceConfig
{
pool<IdString> supported_cell_types;
bool keepdc = false;
WreduceConfig()
{
@ -82,7 +83,7 @@ struct WreduceWorker
SigBit ref = sig_a[i];
for (int k = 0; k < GetSize(sig_s); k++) {
if (ref != Sx && sig_b[k*GetSize(sig_a) + i] != Sx && ref != sig_b[k*GetSize(sig_a) + i])
if ((config->keepdc || (ref != Sx && sig_b[k*GetSize(sig_a) + i] != Sx)) && ref != sig_b[k*GetSize(sig_a) + i])
goto no_match_ab;
if (sig_b[k*GetSize(sig_a) + i] != Sx)
ref = sig_b[k*GetSize(sig_a) + i];
@ -497,6 +498,9 @@ struct WreducePass : public Pass {
log(" Do not change the width of memory address ports. Use this options in\n");
log(" flows that use the 'memory_memx' pass.\n");
log("\n");
log(" -keepdc\n");
log(" Do not optimize explicit don't-care values.\n");
log("\n");
}
void execute(std::vector<std::string> args, Design *design) YS_OVERRIDE
{
@ -511,6 +515,10 @@ struct WreducePass : public Pass {
opt_memx = true;
continue;
}
if (args[argidx] == "-keepdc") {
config.keepdc = true;
continue;
}
break;
}
extra_args(args, argidx, design);