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intel: Map M9K BRAM only on families that have it

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This regresses Cyclone V and Cyclone 10 substantially, but these
numbers were artificial, targeting a BRAM that they did not contain.

Amusingly, synth_intel still does better when synthesizing PicoSoC
than Quartus when neither are inferring block RAM.
This commit is contained in:
Dan Ravensloft 2019-07-22 12:15:22 +01:00
parent c6d8692c97
commit 67b4ce06e0
4 changed files with 12 additions and 5 deletions
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33
techlibs/intel/common/brams_m9k.txt Normal file
View file

@ -0,0 +1,33 @@
bram $__M9K_ALTSYNCRAM_SINGLEPORT_FULL
init 1
abits 13 @M1
dbits 1 @M1
abits 12 @M2
dbits 2 @M2
abits 11 @M3
dbits 4 @M3
abits 10 @M4
dbits 8 @M4
abits 10 @M5
dbits 9 @M5
abits 9 @M6
dbits 16 @M6
abits 9 @M7
dbits 18 @M7
abits 8 @M8
dbits 32 @M8
abits 8 @M9
dbits 36 @M9
groups 2
ports 1 1
wrmode 0 1
enable 1 1
transp 0 0
clocks 2 3
clkpol 2 3
endbram
match $__M9K_ALTSYNCRAM_SINGLEPORT_FULL
min efficiency 2
make_transp
endmatch