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	Added query() API to ModIndex
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					 1 changed files with 46 additions and 8 deletions
				
			
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			@ -29,11 +29,11 @@ YOSYS_NAMESPACE_BEGIN
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struct ModIndex : public RTLIL::Monitor
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{
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	struct PortInfo {
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		const RTLIL::Cell* cell;
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		const RTLIL::IdString &port;
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		const int offset;
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		RTLIL::Cell* cell;
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		RTLIL::IdString port;
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		int offset;
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		PortInfo(RTLIL::Cell* _c, const RTLIL::IdString &_p, int _o) : cell(_c), port(_p), offset(_o) { }
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		PortInfo(RTLIL::Cell* _c, RTLIL::IdString _p, int _o) : cell(_c), port(_p), offset(_o) { }
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		bool operator<(const PortInfo &other) const {
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			if (cell != other.cell)
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			@ -57,13 +57,13 @@ struct ModIndex : public RTLIL::Monitor
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	std::map<RTLIL::SigBit, SigBitInfo> database;
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	bool auto_reload_module;
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	void port_add(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &sig)
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	void port_add(RTLIL::Cell *cell, RTLIL::IdString port, const RTLIL::SigSpec &sig)
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	{
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		for (int i = 0; i < SIZE(sig); i++)
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			database[sigmap(sig[i])].ports.insert(PortInfo(cell, port, i));
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	}
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	void port_del(RTLIL::Cell *cell, const RTLIL::IdString &port, const RTLIL::SigSpec &sig)
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	void port_del(RTLIL::Cell *cell, RTLIL::IdString port, const RTLIL::SigSpec &sig)
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	{
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		for (int i = 0; i < SIZE(sig); i++)
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			database[sigmap(sig[i])].ports.erase(PortInfo(cell, port, i));
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			@ -122,14 +122,52 @@ struct ModIndex : public RTLIL::Monitor
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		auto_reload_module = true;
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	}
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	ModIndex(RTLIL::Module *_m) : module(_m) {
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	ModIndex(RTLIL::Module *_m) : module(_m)
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	{
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		auto_reload_module = true;
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		module->monitors.insert(this);
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	}
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	~ModIndex() {
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	~ModIndex()
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	{
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		module->monitors.erase(this);
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	}
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	SigBitInfo *query(RTLIL::SigBit bit)
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	{
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		if (auto_reload_module)
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			reload_module();
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		auto it = database.find(sigmap(bit));
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		if (it == database.end())
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			return nullptr;
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		else
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			return &it->second;
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	}
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	bool query_is_input(RTLIL::SigBit bit)
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	{
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		const SigBitInfo *info = query(bit);
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		if (info == nullptr)
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			return false;
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		return info->is_input;
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	}
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	bool query_is_output(RTLIL::SigBit bit)
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	{
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		const SigBitInfo *info = query(bit);
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		if (info == nullptr)
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			return false;
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		return info->is_output;
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	}
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	std::set<PortInfo> &query_ports(RTLIL::SigBit bit)
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	{
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		static std::set<PortInfo> empty_result_set;
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		SigBitInfo *info = query(bit);
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		if (info == nullptr)
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			return empty_result_set;
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		return info->ports;
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	}
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};
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struct ModWalker
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