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Fix and cleanup ice40 boxes for carry in/out

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This commit is contained in:
Eddie Hung 2019-06-22 14:27:41 -07:00
parent 7903ebe3e0
commit 63182ed57d
4 changed files with 25 additions and 313 deletions
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4
techlibs/ice40/cells_sim.v
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@ -127,7 +127,7 @@ endmodule
// SiliconBlue Logic Cells
(* abc_box_id = 22, lib_whitebox *)
(* abc_box_id = 2, lib_whitebox *)
module SB_LUT4 (output O, input I0, I1, I2, I3);
parameter [15:0] LUT_INIT = 0;
wire [7:0] s3 = I3 ? LUT_INIT[15:8] : LUT_INIT[7:0];
@ -136,7 +136,7 @@ module SB_LUT4 (output O, input I0, I1, I2, I3);
assign O = I0 ? s1[1] : s1[0];
endmodule
(* abc_box_id = 21, abc_carry, lib_whitebox *)
(* abc_box_id = 1, abc_carry, lib_whitebox *)
module SB_CARRY ((* abc_carry_out *) output CO, input I0, I1, (* abc_carry_in *) input CI);
assign CO = (I0 && I1) || ((I0 || I1) && CI);
endmodule