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Update docs after addition of new pass

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Martin Povišer 2025-07-04 17:57:00 +02:00
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1
docs/source/code_examples/macro_commands/opt.ys
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@ -9,6 +9,7 @@ do
opt_merge opt_merge
opt_share (-full only) opt_share (-full only)
opt_dff (except when called with -noff) opt_dff (except when called with -noff)
opt_hier (-hier only)
opt_clean opt_clean
opt_expr opt_expr
while <changed design> while <changed design>

7
docs/source/using_yosys/synthesis/opt.rst
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@ -192,6 +192,13 @@ control inputs.
Called with ``-nodffe`` and ``-nosdff``, this pass is used to prepare a design Called with ``-nodffe`` and ``-nosdff``, this pass is used to prepare a design
for :doc:`/using_yosys/synthesis/fsm`. for :doc:`/using_yosys/synthesis/fsm`.
Hierarchical optimization - `opt_hier` pass
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This pass considers the design hierarchy and propagates unused signals, constant
signals, and tied-together signals across module boundaries to facilitate
optimization by other passes.
Removing unused cells and wires - `opt_clean` pass Removing unused cells and wires - `opt_clean` pass
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~