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Added Yosys Manual
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manual/FILES_StateOfTheArt/iverilog-0.8.7-buildfixes.patch
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manual/FILES_StateOfTheArt/iverilog-0.8.7-buildfixes.patch
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--- ./elab_net.cc.orig 2012-10-27 22:11:05.345688820 +0200
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+++ ./elab_net.cc 2012-10-27 22:12:23.398075860 +0200
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@@ -29,6 +29,7 @@
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# include <iostream>
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# include <cstring>
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+# include <memory>
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/*
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* This is a state flag that determines whether an elaborate_net must
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--- ./syn-rules.y.orig 2012-10-27 22:25:38.890020489 +0200
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+++ ./syn-rules.y 2012-10-27 22:25:49.146071350 +0200
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@@ -25,6 +25,7 @@
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# include "config.h"
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# include <iostream>
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+# include <stdio.h>
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/*
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* This file implements synthesis based on matching threads and
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