mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-08-25 12:36:02 +00:00
Code Activity

Added Yosys Manual

Browse source
This commit is contained in:
Clifford Wolf 2013-07-20 15:19:12 +02:00
parent 3650fd7fbe
commit 61ed6b32d1
48 changed files with 7949 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

14
manual/FILES_Eval/openmsp430.prj Normal file
View file

@ -0,0 +1,14 @@
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_cell.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_reset.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_register_file.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg_uart.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_alu.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_watchdog.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sfr.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_multiplier.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_mem_backbone.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_frontend.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_execution_unit.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_clock_module.v"
verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/openMSP430.v"