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Resolve package types in interfaces (#3658)
* Resolve package types in interfaces * Added test for resolving of package types in interfaces
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@ -1016,7 +1016,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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// create name resolution entries for all objects with names
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// create name resolution entries for all objects with names
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// also merge multiple declarations for the same wire (e.g. "output foobar; reg foobar;")
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// also merge multiple declarations for the same wire (e.g. "output foobar; reg foobar;")
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if (type == AST_MODULE) {
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if (type == AST_MODULE || type == AST_INTERFACE) {
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current_scope.clear();
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current_scope.clear();
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std::set<std::string> existing;
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std::set<std::string> existing;
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int counter = 0;
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int counter = 0;
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@ -1701,7 +1701,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
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current_filename = filename;
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current_filename = filename;
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if (type == AST_MODULE)
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if (type == AST_MODULE || type == AST_INTERFACE)
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current_scope.clear();
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current_scope.clear();
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// convert defparam nodes to cell parameters
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// convert defparam nodes to cell parameters
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@ -4691,7 +4691,7 @@ void AstNode::mem2reg_as_needed_pass1(dict<AstNode*, pool<std::string>> &mem2reg
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if (type == AST_MEMORY && (get_bool_attribute(ID::mem2reg) || (flags & AstNode::MEM2REG_FL_ALL) || !(is_reg || is_logic)))
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if (type == AST_MEMORY && (get_bool_attribute(ID::mem2reg) || (flags & AstNode::MEM2REG_FL_ALL) || !(is_reg || is_logic)))
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mem2reg_candidates[this] |= AstNode::MEM2REG_FL_FORCED;
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mem2reg_candidates[this] |= AstNode::MEM2REG_FL_FORCED;
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if (type == AST_MODULE && get_bool_attribute(ID::mem2reg))
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if ((type == AST_MODULE || type == AST_INTERFACE) && get_bool_attribute(ID::mem2reg))
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children_flags |= AstNode::MEM2REG_FL_ALL;
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children_flags |= AstNode::MEM2REG_FL_ALL;
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dict<AstNode*, uint32_t> *proc_flags_p = NULL;
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dict<AstNode*, uint32_t> *proc_flags_p = NULL;
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24
tests/svinterfaces/resolve_types.sv
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24
tests/svinterfaces/resolve_types.sv
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@ -0,0 +1,24 @@
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// This test checks that types, including package types, are resolved from within an interface.
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typedef logic [7:0] x_t;
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package pkg;
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typedef logic [7:0] y_t;
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endpackage
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interface iface;
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x_t x;
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pkg::y_t y;
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endinterface
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module dut (input logic [7:0] x, output logic [7:0] y);
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iface intf();
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assign intf.x = x;
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assign y = intf.y;
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ondemand u(.intf);
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endmodule
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module ref (input logic [7:0] x, output logic [7:0] y);
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assign y = ~x;
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endmodule
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6
tests/svinterfaces/resolve_types.ys
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6
tests/svinterfaces/resolve_types.ys
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@ -0,0 +1,6 @@
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read_verilog -sv resolve_types.sv
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hierarchy -libdir . -check
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flatten
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equiv_make ref dut equiv
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equiv_simple
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equiv_status -assert
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@ -4,3 +4,4 @@
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./runone.sh svinterface_at_top
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./runone.sh svinterface_at_top
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./run_simple.sh load_and_derive
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./run_simple.sh load_and_derive
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./run_simple.sh resolve_types
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