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Update codebase for macc_v2

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This commit is contained in:
Martin Povišer 2025-01-10 13:42:26 +01:00
parent 5882055899
commit 61450e8b6e
9 changed files with 16 additions and 15 deletions
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2
kernel/celledges.cc
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@ -453,7 +453,7 @@ bool YOSYS_NAMESPACE_PREFIX AbstractCellEdgesDatabase::add_edges_from_cell(RTLIL
}
// FIXME: $mul $div $mod $divfloor $modfloor $slice $concat
// FIXME: $lut $sop $alu $lcu $macc $fa
// FIXME: $lut $sop $alu $lcu $macc $macc_v2 $fa
// FIXME: $mul $div $mod $divfloor $modfloor $pow $slice $concat $bweqx
// FIXME: $lut $sop $alu $lcu $macc $fa $logic_and $logic_or $bwmux

1
kernel/celltypes.h
View file

@ -144,6 +144,7 @@ struct CellTypes
setup_type(ID($lcu), {ID::P, ID::G, ID::CI}, {ID::CO}, true);
setup_type(ID($alu), {ID::A, ID::B, ID::CI, ID::BI}, {ID::X, ID::Y, ID::CO}, true);
setup_type(ID($macc_v2), {ID::A, ID::B, ID::C}, {ID::Y}, true);
setup_type(ID($fa), {ID::A, ID::B, ID::C}, {ID::X, ID::Y}, true);
}

2
kernel/consteval.h
View file

@ -310,7 +310,7 @@ struct ConstEval
}
}
}
else if (cell->type == ID($macc))
else if (cell->type.in(ID($macc), ID($macc_v2)))
{
Macc macc;
macc.from_cell(cell);

16
kernel/rtlil.cc
View file

@ -1472,16 +1472,16 @@ namespace {
error(__LINE__);
if (param(ID::NADDENDS) <= 0)
error(__LINE__);
param_bits(ID::PRODUCT_NEGATED, param(ID::NPRODUCTS));
param_bits(ID::ADDEND_NEGATED, param(ID::NADDENDS));
param_bits(ID::A_SIGNED, param(ID::NPRODUCTS));
param_bits(ID::B_SIGNED, param(ID::NPRODUCTS));
param_bits(ID::C_SIGNED, param(ID::NADDENDS));
param_bits(ID::PRODUCT_NEGATED, min(param(ID::NPRODUCTS), 1));
param_bits(ID::ADDEND_NEGATED, min(param(ID::NADDENDS), 1));
param_bits(ID::A_SIGNED, min(param(ID::NPRODUCTS), 1));
param_bits(ID::B_SIGNED, min(param(ID::NPRODUCTS), 1));
param_bits(ID::C_SIGNED, min(param(ID::NADDENDS), 1));
if (cell->getParam(ID::A_SIGNED) != cell->getParam(ID::B_SIGNED))
error(__LINE__);
param_bits(ID::A_WIDTHS, param(ID::NPRODUCTS) * 16);
param_bits(ID::B_WIDTHS, param(ID::NPRODUCTS) * 16);
param_bits(ID::C_WIDTHS, param(ID::NADDENDS) * 16);
param_bits(ID::A_WIDTHS, min(param(ID::NPRODUCTS) * 16, 1));
param_bits(ID::B_WIDTHS, min(param(ID::NPRODUCTS) * 16, 1));
param_bits(ID::C_WIDTHS, min(param(ID::NADDENDS) * 16, 1));
const Const &a_width = cell->getParam(ID::A_WIDTHS);
const Const &b_width = cell->getParam(ID::B_WIDTHS);
const Const &c_width = cell->getParam(ID::C_WIDTHS);

2
kernel/satgen.cc
View file

@ -740,7 +740,7 @@ bool SatGen::importCell(RTLIL::Cell *cell, int timestep)
return true;
}
if (cell->type == ID($macc))
if (cell->type.in(ID($macc), ID($macc_v2)))
{
std::vector<int> a = importDefSigSpec(cell->getPort(ID::A), timestep);
std::vector<int> y = importDefSigSpec(cell->getPort(ID::Y), timestep);