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Add memory_bmux2rom pass.

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Marcelina Kościelnicka 2022-05-18 21:20:42 +02:00
parent 982a11c709
commit 606f1637ae
4 changed files with 124 additions and 1 deletions
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tests/opt/memory_bmux2rom.ys Normal file
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read_ilang << EOT
module \top
wire width 4 input 0 \S
wire width 5 output 1 \Y
cell $bmux $0
parameter \WIDTH 5
parameter \S_WIDTH 4
connect \A 80'10110100011101110001110010001110101010111000110011111111111110100000110100111000
connect \S \S
connect \Y \Y
end
end
EOT
hierarchy -auto-top
design -save preopt
memory_bmux2rom
select -assert-count 1 t:$memrd_v2
memory_map
opt_dff
design -stash postopt
equiv_opt -assert -run prepare: dummy