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simlib: Silence iverilog warning for $lut

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iverilog complains about implicitly truncating LUT when connecting it to
the `$bmux` A input. This explicitly truncates it to avoid that warning
without changing the behaviour otherwise.
This commit is contained in:
Jannis Harder 2022-11-10 16:31:45 +01:00
parent 39ac113402
commit 605d127517
1 changed files with 1 additions and 1 deletions
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2
techlibs/common/simlib.v
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@ -1377,7 +1377,7 @@ parameter LUT = 0;
input [WIDTH-1:0] A;
output Y;
\$bmux #(.WIDTH(1), .S_WIDTH(WIDTH)) mux(.A(LUT), .S(A), .Y(Y));
\$bmux #(.WIDTH(1), .S_WIDTH(WIDTH)) mux(.A(LUT[(1<<WIDTH)-1:0]), .S(A), .Y(Y));
endmodule