mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-29 03:45:52 +00:00
Code Activity

Add params

Browse source
This commit is contained in:
Eddie Hung 2019-07-18 21:02:49 -07:00
parent a777be3091
commit 601fac97e4
1 changed files with 6 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

6
techlibs/xilinx/dsp_map.v
View file

@ -1,4 +1,10 @@
module \$__MUL25X18 (input signed [24:0] A, input signed [17:0] B, output signed [42:0] Y);
parameter A_SIGNED = 0;
parameter B_SIGNED = 0;
parameter A_WIDTH = 0;
parameter B_WIDTH = 0;
parameter Y_WIDTH = 0;
wire [47:0] P_48;
DSP48E1 #(
// Disable all registers