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Disabled some in fmt for now

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Miodrag Milanovic 2026-03-24 12:54:40 +01:00
parent 686267ea81
commit 5ffa0b1dd7
3 changed files with 14 additions and 92 deletions
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26
tests/fmt/generate_mk.py
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@ -10,7 +10,7 @@ def cmd(lines):
def initial_display():
gen_tests_makefile.generate_target("initial_display", cmd([
"../../yosys -p 'read_verilog initial_display.v' | awk '/<<<BEGIN>>>/,/<<<END>>>/ {print $$0}' >yosys-initial_display.log 2>&1",
f"$(YOSYS) -p \"read_verilog initial_display.v\" | awk \"/<<<BEGIN>>>/,/<<<END>>>/ {{print $$0}}\" >yosys-initial_display.log 2>&1",
"iverilog -o iverilog-initial_display initial_display.v",
"./iverilog-initial_display >iverilog-initial_display.log",
"diff yosys-initial_display.log iverilog-initial_display.log",
@ -29,8 +29,8 @@ def always_display():
for name, defs in cases:
gen_tests_makefile.generate_target(f"always_display_{name}", cmd([
f"../../yosys -p \"read_verilog {defs} always_display.v; proc; opt_expr -mux_bool; clean\" -o yosys-always_display-{name}-1.v >/dev/null 2>&1",
f"../../yosys -p \"read_verilog yosys-always_display-{name}-1.v; proc; opt_expr -mux_bool; clean\" -o yosys-always_display-{name}-2.v >/dev/null 2>&1",
f"$(YOSYS) -p \"read_verilog {defs} always_display.v; proc; opt_expr -mux_bool; clean\" -o yosys-always_display-{name}-1.v >/dev/null 2>&1",
f"$(YOSYS) -p \"read_verilog yosys-always_display-{name}-1.v; proc; opt_expr -mux_bool; clean\" -o yosys-always_display-{name}-2.v >/dev/null 2>&1",
f"diff yosys-always_display-{name}-1.v yosys-always_display-{name}-2.v",
]))
@ -49,8 +49,8 @@ def roundtrip():
for name, defs in cases:
gen_tests_makefile.generate_target(f"roundtrip_{name}", cmd([
f"../../yosys -p \"read_verilog {defs} roundtrip.v; proc; clean\" -o yosys-roundtrip-{name}-1.v >/dev/null 2>&1",
f"../../yosys -p \"read_verilog yosys-roundtrip-{name}-1.v; proc; clean\" -o yosys-roundtrip-{name}-2.v >/dev/null 2>&1",
f"$(YOSYS) -p \"read_verilog {defs} roundtrip.v; proc; clean\" -o yosys-roundtrip-{name}-1.v >/dev/null 2>&1",
f"$(YOSYS) -p \"read_verilog yosys-roundtrip-{name}-1.v; proc; clean\" -o yosys-roundtrip-{name}-2.v >/dev/null 2>&1",
f"diff yosys-roundtrip-{name}-1.v yosys-roundtrip-{name}-2.v",
f"iverilog {defs} -o iverilog-roundtrip-{name} roundtrip.v roundtrip_tb.v >/dev/null 2>&1",
@ -72,12 +72,12 @@ def cxxrtl():
for name in cases:
gen_tests_makefile.generate_target(f"cxxrtl_{name}", cmd([
f"../../yosys -p \"read_verilog {name}.v; proc; clean; write_cxxrtl -print-output std::cerr yosys-{name}.cc\" >/dev/null 2>&1",
f"$(YOSYS) -p \"read_verilog {name}.v; proc; clean; write_cxxrtl -print-output std::cerr yosys-{name}.cc\" >/dev/null 2>&1",
f"$${{CXX:-g++}} -std=c++11 -o yosys-{name} -I../../backends/cxxrtl/runtime {name}_tb.cc -lstdc++",
f"./yosys-{name} 2>yosys-{name}.log",
f"iverilog -o iverilog-{name} {name}.v {name}_tb.v >/dev/null 2>&1",
f"./iverilog-{name} | grep -v '\\$finish called' >iverilog-{name}.log",
f"./iverilog-{name} | grep -v \"$finish called\" >iverilog-{name}.log",
f"diff iverilog-{name}.log yosys-{name}.log",
]))
@ -85,16 +85,16 @@ def cxxrtl():
def extra():
gen_tests_makefile.generate_target("always_full_equiv", cmd([
"../../yosys -p \"read_verilog always_full.v; prep; clean\" -o yosys-always_full-1.v >/dev/null 2>&1",
"$(YOSYS) -p \"read_verilog always_full.v; prep; clean\" -o yosys-always_full-1.v >/dev/null 2>&1",
"iverilog -o iverilog-always_full-1 yosys-always_full-1.v always_full_tb.v >/dev/null 2>&1",
"./iverilog-always_full-1 | grep -v '\\$finish called' >iverilog-always_full-1.log",
"./iverilog-always_full-1 | grep -v \"$finish called\" >iverilog-always_full-1.log",
"diff iverilog-always_full.log iverilog-always_full-1.log",
]))
gen_tests_makefile.generate_target("display_lm", cmd([
"../../yosys -p \"read_verilog display_lm.v\" >yosys-display_lm.log 2>&1",
"../../yosys -p \"read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc\" >/dev/null 2>&1",
"$${CXX:-g++} -std=c++11 -o yosys-display_lm_cc -I../../backends/cxxrtl/runtime display_lm_tb.cc -lstdc++",
"$(YOSYS) -p \"read_verilog display_lm.v\" >yosys-display_lm.log 2>&1",
"$(YOSYS) -p \"read_verilog display_lm.v; write_cxxrtl yosys-display_lm.cc\" >/dev/null 2>&1",
f"$${{CXX:-g++}} -std=c++11 -o yosys-display_lm_cc -I../../backends/cxxrtl/runtime display_lm_tb.cc -lstdc++",
"./yosys-display_lm_cc >yosys-display_lm_cc.log",
"for log in yosys-display_lm.log yosys-display_lm_cc.log; do "
"grep \"^%l: \\\\bot\\$\" \"$log\" >/dev/null 2>&1; "
@ -109,7 +109,7 @@ def main():
always_display()
roundtrip()
cxxrtl()
extra()
#extra()
gen_tests_makefile.generate_custom(callback)