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$__ICE40_CARRY_LUT4 -> $__ICE40_FULL_ADDER as per @whitequark

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This commit is contained in:
Eddie Hung 2019-07-15 12:03:51 -07:00
parent d032198fac
commit 5fb27c071b
7 changed files with 8 additions and 8 deletions
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2
techlibs/ice40/arith_map.v
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@ -45,7 +45,7 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO);
genvar i;
generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice
`ifdef _ABC
\$__ICE40_CARRY_LUT4 carry (
\$__ICE40_FULL_ADDER carry (
.A(AA[i]),
.B(BB[i]),
.CI(C[i]),