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add 32-bit BRAM and byte-enables
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2 changed files with 25 additions and 4 deletions
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@ -109,12 +109,30 @@ module \$__GW1NR_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN);
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.RESET_MODE("SYNC")
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) _TECHMAP_REPLACE_ (
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.CLKA(CLK2), .CLKB(CLK3),
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.WREA(A1EN), .OCE(1'b0),
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.WREA(|A1EN), .OCE(1'b0),
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.WREB(1'b0), .CEB(B1EN), .CEA(1'b1),
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.RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
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.DI({{(32-CFG_DBITS){1'b0}}, A1DATA}),
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.DO({open, B1DATA}),
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.ADA({A1ADDR, {(12-CFG_ABITS){1'b0}}, 2'b11}),
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.ADA({A1ADDR, {(12-CFG_ABITS){1'b0}}, A1EN}),
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.ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}})
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);
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end else if (CFG_DBITS <= 32) begin
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SDP #(
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`include "bram_init_16.vh"
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.READ_MODE(0),
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.BIT_WIDTH_0(32),
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.BIT_WIDTH_1(32),
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.BLK_SEL(3'b000),
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.RESET_MODE("SYNC")
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) _TECHMAP_REPLACE_ (
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.CLKA(CLK2), .CLKB(CLK3),
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.WREA(|A1EN), .OCE(1'b0),
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.WREB(1'b0), .CEB(B1EN), .CEA(1'b1),
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.RESETA(1'b0), .RESETB(1'b0), .BLKSEL(3'b000),
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.DI(A1DATA),
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.DO(B1DATA),
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.ADA({A1ADDR, {(10-CFG_ABITS){1'b0}}, A1EN}),
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.ADB({B1ADDR, {(14-CFG_ABITS){1'b0}}})
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);
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end else begin
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