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Merge pull request #18 from alaindargelas/main

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remove output port bitblast index
This commit is contained in:
Akash Levy 2024-11-10 14:58:11 -08:00 • committed by GitHub
commit 5f2b77df13
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1 changed files with 46 additions and 32 deletions
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78
passes/cmds/splitnetlist.cc
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@ -76,6 +76,16 @@ void sigCellDrivers(RTLIL::Design *design, dict<RTLIL::SigSpec, std::set<Cell *>
sig2CellsInFanin[actual] = newSet; sig2CellsInFanin[actual] = newSet;
} }
newSet->insert(cell); newSet->insert(cell);
for (int i = 0; i < actual.size(); i++) {
SigSpec bit_sig = actual.extract(i, 1);
if (sig2CellsInFanin.count(bit_sig)) {
newSet = sig2CellsInFanin[bit_sig];
} else {
newSet = new std::set<Cell *>;
sig2CellsInFanin[bit_sig] = newSet;
}
newSet->insert(cell);
}
} }
} }
} }
@ -92,38 +102,20 @@ void lhs2rhs(RTLIL::Design *design, dict<RTLIL::SigSpec, RTLIL::SigSpec> &lhsSig
continue; continue;
} }
if (!lhs.is_chunk()) { if (!lhs.is_chunk()) {
if (lhs.chunks().size() != rhs.chunks().size()) { // If lhs is not a chunk (leaf) ie: assign {a,b} = ..., then bitblast both lhs and rhs
auto rit = rhs.chunks().rbegin(); std::vector<SigSpec> lhsBits;
long unsigned rhsSize = 0; for (int i = 0; i < lhs.size(); i++) {
while (rit != rhs.chunks().rend()) { SigSpec bit_sig = lhs.extract(i, 1);
RTLIL::SigSpec sub_rhs = *rit; lhsBits.push_back(bit_sig);
if (sub_rhs.is_fully_const()) {
rhsSize += (sub_rhs.as_chunk()).width;
} else {
rhsSize++;
}
rit++;
}
if (lhs.chunks().size() != rhsSize) {
continue;
}
} }
auto lit = lhs.chunks().rbegin(); std::vector<SigSpec> rhsBits;
auto rit = rhs.chunks().rbegin(); for (int i = 0; i < rhs.size(); i++) {
while (rit != rhs.chunks().rend()) { SigSpec bit_sig = rhs.extract(i, 1);
RTLIL::SigSpec sub_lhs = *lit; rhsBits.push_back(bit_sig);
RTLIL::SigSpec sub_rhs = *rit; }
if (sub_rhs.is_fully_const()) { for (uint32_t i = 0; i < lhsBits.size(); i++) {
int constSize = (sub_rhs.as_chunk()).width; if (i < rhsBits.size())
while (constSize--) { lhsSig2rhsSig[lhsBits[i]] = rhsBits[i];
lit++;
}
rit++;
continue;
}
lhsSig2rhsSig[sub_lhs] = sub_rhs;
lit++;
rit++;
} }
} else { } else {
lhsSig2rhsSig[lhs] = rhs; lhsSig2rhsSig[lhs] = rhs;
@ -172,7 +164,29 @@ struct SplitNetlist : public ScriptPass {
if (!wire->port_output) if (!wire->port_output)
continue; continue;
std::string output_port_name = wire->name.c_str(); std::string output_port_name = wire->name.c_str();
std::string_view po_prefix = rtrim_until(std::string_view(output_port_name), '_'); if (output_port_name.empty())
continue;
// We want to truncate the final _<index>_ part of the string
// Example: "add_Y_0_"
// Result: "add_Y"
std::string::iterator end = output_port_name.end()-1;
if ((*end) == '_') {
// Last character is an _, it is a bit blasted index
end--;
for (; end != output_port_name.begin(); end--) {
if ((*end) != '_') {
// Truncate until the next _
continue;
} else {
// Truncate the _
break;
}
}
}
std::string no_bitblast_prefix;
std::copy(output_port_name.begin(), end, std::back_inserter(no_bitblast_prefix));
// We then truncate the port name, Result: "add"
std::string_view po_prefix = rtrim_until(std::string_view(no_bitblast_prefix), '_');
std::set<Cell *> visitedCells; std::set<Cell *> visitedCells;
std::set<RTLIL::SigSpec> visitedSigSpec; std::set<RTLIL::SigSpec> visitedSigSpec;
RTLIL::SigSpec actual = wire; RTLIL::SigSpec actual = wire;