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Merge pull request #5961 from YosysHQ/emil/opt_muxtree-fix-reconvergence

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opt_muxtree: fix reconvergence
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Emil J 2026-07-27 09:08:13 +00:00 • committed by GitHub
commit 5d2fbf8187
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2 changed files with 76 additions and 14 deletions
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tests/opt/opt_muxtree_port_reconverge.ys Normal file
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read_rtlil << EOT
module \top
wire input 1 \a
wire input 2 \b
wire output 3 \out
wire $0\out[0:0]
wire \y
wire $1\out[0:0]
wire \s
wire \q
wire \n_a
cell $mux \mux
parameter \WIDTH 1
connect \A 1'0
connect \B \a
connect \S \b
connect \Y \y
end
attribute \full_case 1
cell $pmux \pmux
parameter \WIDTH 1
parameter \S_WIDTH 2
connect \A 1'x
connect \B { \y \y }
connect \S { \n_a \s }
connect \Y \q
end
attribute \full_case 1
cell $not \not
parameter \A_SIGNED 0
parameter \Y_WIDTH 1
parameter \A_WIDTH 1
connect \A \a
connect \Y \n_a
end
connect $0\out[0:0] $1\out[0:0]
connect \s \a
connect $1\out[0:0] \q
connect \out \q
end
EOT
# a drives out
select -assert-any i:a %co* o:out %i
opt_muxtree
opt_reduce
opt_expr
# a still drives out
select -assert-any o:out %ci* i:a %i