mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-06-27 00:18:46 +00:00
Code Activity

Fix normal (non-array) hierarchy -auto-top.

Browse source 
Add simple test.
This commit is contained in:
Jim Lawson 2019-02-19 14:35:15 -08:00
parent 5c504c5ae6
commit 5c4a72c43e
3 changed files with 74 additions and 10 deletions
Download patch file Download diff file Expand all files Collapse all files

18
passes/hierarchy/hierarchy.cc
View file

@ -523,15 +523,15 @@ int find_top_mod_score(Design *design, Module *module, dict<Module*, int> &db)
// Is this an array instance // Is this an array instance
if (celltype.substr(0, 7) == "$array:") { if (celltype.substr(0, 7) == "$array:") {
celltype = basic_cell_type(celltype); celltype = basic_cell_type(celltype);
// Is this cell is a module instance? }
if (celltype[0] != '$') { // Is this cell a module instance?
auto instModule = design->module(celltype); if (celltype[0] != '$') {
// If there is no instance for this, issue a warning. auto instModule = design->module(celltype);
if (instModule == NULL) { // If there is no instance for this, issue a warning.
log_warning("find_top_mod_score: no instance for %s.%s\n", celltype.c_str(), cell->name.c_str()); if (instModule == NULL) {
} log_warning("find_top_mod_score: no instance for %s.%s\n", celltype.c_str(), cell->name.c_str());
if (instModule != NULL) } else {
score = max(score, find_top_mod_score(design, instModule, db) + 1); score = max(score, find_top_mod_score(design, instModule, db) + 1);
} }
} }
} }

56
tests/various/hierarchy.sh Normal file
View file

@ -0,0 +1,56 @@
#!/usr/bin/env bash
# Simple test of hierarchy -auto-top.
set -e
../../yosys -q -s - <<- EOY 2>&1 | grep "Automatically selected TOP as design top module"
read_verilog << EOV
module TOP(a, y);
input a;
output [31:0] y;
aoi12 p [31:0] (a, y);
endmodule
module aoi12(a, y);
input a;
output y;
assign y = ~a;
endmodule
EOV
hierarchy -auto-top
EOY
../../yosys -q -s - <<- EOY 2>&1 | grep "Automatically selected TOP as design top module"
read_verilog << EOV
module aoi12(a, y);
input a;
output y;
assign y = ~a;
endmodule
module TOP(a, y);
input a;
output [31:0] y;
aoi12 foo (a, y);
endmodule
EOV
hierarchy -auto-top
EOY
../../yosys -q -s - <<- EOY 2>&1 | grep "Automatically selected noTop as design top module."
read_verilog << EOV
module aoi12(a, y);
input a;
output y;
assign y = ~a;
endmodule
module noTop(a, y);
input a;
output [31:0] y;
endmodule
EOV
hierarchy -auto-top
EOY

10
tests/various/run-test.sh
View file

@ -1,6 +1,14 @@
#!/bin/bash #!/usr/bin/env bash
set -e set -e
for x in *.ys; do for x in *.ys; do
echo "Running $x.." echo "Running $x.."
../../yosys -ql ${x%.ys}.log $x ../../yosys -ql ${x%.ys}.log $x
done done
# Run any .sh files in this directory (with the exception of the file - run-test.sh
shell_tests=$(echo *.sh | sed -e 's/run-test.sh//')
if [ "$shell_tests" ]; then
for s in $shell_tests; do
echo "Running $s.."
bash $s >& ${s%.sh}.log
done
fi