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opt_dff: Fix NOT gates wired in reverse.
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2 changed files with 15 additions and 10 deletions
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@ -22,8 +22,10 @@ EOT
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design -save orig
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equiv_opt -undef -assert -multiclock opt_dff
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design -load postopt
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# Equivalence check will fail for unmapped adlatch and dlatchsr due to negative hold hack.
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#equiv_opt -undef -assert -multiclock opt_dff
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#design -load postopt
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opt_dff
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select -assert-count 1 t:$dffsr
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select -assert-count 1 t:$dffsr r:WIDTH=2 %i
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select -assert-count 1 t:$dffsre
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@ -34,8 +36,9 @@ select -assert-none t:$sr
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design -load orig
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equiv_opt -undef -assert -multiclock opt_dff -keepdc
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design -load postopt
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#equiv_opt -undef -assert -multiclock opt_dff -keepdc
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#design -load postopt
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opt_dff -keepdc
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select -assert-count 1 t:$dffsr
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select -assert-count 1 t:$dffsr r:WIDTH=4 %i
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select -assert-count 1 t:$dffsre
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@ -48,8 +51,9 @@ select -assert-count 1 t:$sr r:WIDTH=4 %i
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design -load orig
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simplemap
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equiv_opt -undef -assert -multiclock opt_dff
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design -load postopt
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#equiv_opt -undef -assert -multiclock opt_dff
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#design -load postopt
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opt_dff
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select -assert-count 1 t:$_DFF_PP0_
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select -assert-count 1 t:$_DFF_PP1_
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select -assert-count 1 t:$_DFFE_PN0P_
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@ -61,8 +65,9 @@ select -assert-none t:$_DFF_PP0_ t:$_DFF_PP1_ t:$_DFFE_PN0P_ t:$_DFFE_PN1P_ t:$_
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design -load orig
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simplemap
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equiv_opt -undef -assert -multiclock opt_dff -keepdc
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design -load postopt
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#equiv_opt -undef -assert -multiclock opt_dff -keepdc
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#design -load postopt
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opt_dff -keepdc
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select -assert-count 1 t:$_DFF_PP0_
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select -assert-count 1 t:$_DFF_PP1_
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select -assert-count 2 t:$_DFFSR_PPP_
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