mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-09-30 21:19:30 +00:00
Code Activity

Remove .c_str() from log_cmd_error() and log_file_error() parameters

Browse source
This commit is contained in:
Robert O'Callahan 2025-09-16 22:59:08 +00:00
parent b95549b469
commit 5ac6858f26
59 changed files with 163 additions and 163 deletions
Download patch file Download diff file Expand all files Collapse all files

16
passes/sat/eval.cc
View file

@ -94,11 +94,11 @@ struct BruteForceEquivChecker
continue;
if (mod2->wire(w->name) == nullptr)
log_cmd_error("Port %s in module 1 has no counterpart in module 2!\n", w->name.c_str());
log_cmd_error("Port %s in module 1 has no counterpart in module 2!\n", w->name);
RTLIL::Wire *w2 = mod2->wire(w->name);
if (w->width != w2->width || w->port_input != w2->port_input || w->port_output != w2->port_output)
log_cmd_error("Port %s in module 1 does not match its counterpart in module 2!\n", w->name.c_str());
log_cmd_error("Port %s in module 1 does not match its counterpart in module 2!\n", w->name);
if (w->port_input) {
mod1_inputs.append(w);
@ -454,11 +454,11 @@ struct EvalPass : public Pass {
for (auto &it : sets) {
RTLIL::SigSpec lhs, rhs;
if (!RTLIL::SigSpec::parse_sel(lhs, design, module, it.first))
log_cmd_error("Failed to parse lhs set expression `%s'.\n", it.first.c_str());
log_cmd_error("Failed to parse lhs set expression `%s'.\n", it.first);
if (!RTLIL::SigSpec::parse_rhs(lhs, rhs, module, it.second))
log_cmd_error("Failed to parse rhs set expression `%s'.\n", it.second.c_str());
log_cmd_error("Failed to parse rhs set expression `%s'.\n", it.second);
if (!rhs.is_fully_const())
log_cmd_error("Right-hand-side set expression `%s' is not constant.\n", it.second.c_str());
log_cmd_error("Right-hand-side set expression `%s' is not constant.\n", it.second);
if (lhs.size() != rhs.size())
log_cmd_error("Set expression with different lhs and rhs sizes: %s (%s, %d bits) vs. %s (%s, %d bits)\n",
it.first.c_str(), log_signal(lhs), lhs.size(), it.second.c_str(), log_signal(rhs), rhs.size());
@ -476,7 +476,7 @@ struct EvalPass : public Pass {
for (auto &it : shows) {
RTLIL::SigSpec signal, value, undef;
if (!RTLIL::SigSpec::parse_sel(signal, design, module, it))
log_cmd_error("Failed to parse show expression `%s'.\n", it.c_str());
log_cmd_error("Failed to parse show expression `%s'.\n", it);
value = signal;
if (set_undef) {
while (!ce.eval(value, undef)) {
@ -502,14 +502,14 @@ struct EvalPass : public Pass {
for (auto &it : shows) {
RTLIL::SigSpec sig;
if (!RTLIL::SigSpec::parse_sel(sig, design, module, it))
log_cmd_error("Failed to parse show expression `%s'.\n", it.c_str());
log_cmd_error("Failed to parse show expression `%s'.\n", it);
signal.append(sig);
}
for (auto &it : tables) {
RTLIL::SigSpec sig;
if (!RTLIL::SigSpec::parse_sel(sig, design, module, it))
log_cmd_error("Failed to parse table expression `%s'.\n", it.c_str());
log_cmd_error("Failed to parse table expression `%s'.\n", it);
tabsigs.append(sig);
}