diff --git a/tests/techmap/abc9.ys b/tests/techmap/abc9.ys
index 20f263da8..62b5dfef6 100644
--- a/tests/techmap/abc9.ys
+++ b/tests/techmap/abc9.ys
@@ -38,3 +38,15 @@ abc9 -lut 4
 design -load gold
 scratchpad -copy abc9.script.flow3 abc9.script
 abc9 -lut 4
+
+
+design -reset
+read_verilog -icells <<EOT
+module top(input a, b, output o);
+assign o = ~(a & b);
+endmodule
+EOT
+abc9 -lut 4
+clean
+select -assert-count 1 t:$lut
+select -assert-none t:$lut t:* %D