From 58dbf758850ca8891f04afbea25a207283295e35 Mon Sep 17 00:00:00 2001
From: Robert O'Callahan <rocallahan@google.com>
Date: Tue, 28 Oct 2025 12:36:47 +0000
Subject: [PATCH] Make SigSpec::is_fully_zero use chunk iterator

---
 kernel/rtlil.cc | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index bb4c6a722..a1f4b27a5 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -5442,12 +5442,11 @@ bool RTLIL::SigSpec::is_fully_zero() const
 {
 	cover("kernel.rtlil.sigspec.is_fully_zero");
 
-	pack();
-	for (auto it = chunks_.begin(); it != chunks_.end(); it++) {
-		if (it->width > 0 && it->wire != NULL)
+	for (auto &chunk : chunks()) {
+		if (chunk.width > 0 && chunk.wire != NULL)
 			return false;
-		for (size_t i = 0; i < it->data.size(); i++)
-			if (it->data[i] != RTLIL::State::S0)
+		for (RTLIL::State d : chunk.data)
+			if (d != RTLIL::State::S0)
 				return false;
 	}
 	return true;