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symfpu: Configurable rounding modes

Including tests, but currently only testing rounding modes on multiply.
Also missing the ...01 case.
This commit is contained in:
Krystine Sherwin 2026-06-06 09:34:41 +12:00
parent c02114af8a
commit 58c2c95618
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3 changed files with 132 additions and 11 deletions

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@ -3,6 +3,7 @@ set -eu
source ../gen-tests-makefile.sh
# operators
ops="sqrt add sub mul div muladd"
for op in $ops; do
rm -f ${op}_edges.*
@ -32,4 +33,33 @@ prove_op mul "-DMUL -DMULS"
prove_op div "-DDIV"
prove_op muladd "-DMULADD -DMULS -DADDS"
# rounding modes
rms="RNE RNA RTP RTN RTZ"
for rm in $rms; do
rm -f ${rm}_edges.*
done
prove_rm() {
rm=$1
defs=$2
ys_file=${rm}_edges.ys
echo """\
symfpu -rm $rm
sat -prove-asserts -verify
chformal -remove
opt
read_verilog -sv -formal $defs edges.sv
chformal -lower
prep -top edges -flatten
sat -prove-asserts -verify
""" > $ys_file
}
prove_rm RNE "-DRNE"
prove_rm RNA "-DRNA"
prove_rm RTP "-DRTP"
prove_rm RTN "-DRTN"
prove_rm RTZ "-DRTZ"
generate_mk --yosys-scripts