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Merge branch 'YosysHQ:main' into master

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Akash Levy 2024-08-21 18:52:38 -07:00 • committed by GitHub
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10
tests/various/rtlil_signed_attribute.ys Normal file
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! mkdir -p temp
read_rtlil <<EOT
module \test
attribute \bottom_bound 3's101
wire width 3 output 1 \a
connect \a 3'001
end
EOT
write_rtlil temp/rtlil_signed_attribute.il
! grep -F -q "attribute \bottom_bound 3's101" temp/rtlil_signed_attribute.il