mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-11-03 21:09:12 +00:00
Code Activity

Fixed two minor bugs in constant parsing

Browse source
This commit is contained in:
Clifford Wolf 2014-11-24 14:39:24 +01:00
parent 751fb33688
commit 56c7d1e266
2 changed files with 7 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

6
frontends/verilog/const2ast.cc
View file

@ -182,7 +182,7 @@ AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type, bool warn
if (str == endptr)
len_in_bits = -1;
// The "<bits>'s?[bodh]<digits>" syntax
// The "<bits>'s?[bodhBODH]<digits>" syntax
if (*endptr == '\'')
{
std::vector<RTLIL::State> data;
@ -194,15 +194,19 @@ AstNode *VERILOG_FRONTEND::const2ast(std::string code, char case_type, bool warn
switch (*(endptr+1))
{
case 'b':
case 'B':
my_strtobin(data, endptr+2, len_in_bits, 2, case_type);
break;
case 'o':
case 'O':
my_strtobin(data, endptr+2, len_in_bits, 8, case_type);
break;
case 'd':
case 'D':
my_strtobin(data, endptr+2, len_in_bits, 10, case_type);
break;
case 'h':
case 'H':
my_strtobin(data, endptr+2, len_in_bits, 16, case_type);
break;
default:

4
frontends/verilog/verilog_lexer.l
View file

@ -177,12 +177,12 @@ YOSYS_NAMESPACE_END
"genvar" { return TOK_GENVAR; }
"real" { return TOK_REAL; }
[0-9]+ {
[0-9][0-9_]* {
frontend_verilog_yylval.string = new std::string(yytext);
return TOK_CONST;
}
[0-9]*[ \t]*\'s?[bodh][ \t\r\n]*[0-9a-fA-FzxZX?_]+ {
[0-9]*[ \t]*\'s?[bodhBODH][ \t\r\n]*[0-9a-fA-FzxZX?_]+ {
frontend_verilog_yylval.string = new std::string(yytext);
return TOK_CONST;
}