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Merge pull request #5790 from Eiko-Eira/main

Fixed typos and incorrect grammar
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Lofty 2026-04-11 03:26:55 +00:00 committed by GitHub
commit 564c617721
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2 changed files with 4 additions and 4 deletions

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@ -5,7 +5,7 @@ Getting Started
Outline of a Yosys command
--------------------------
Here is a the C++ code for a "hello_world" Yosys command (hello.cc):
Here is the C++ code for a "hello_world" Yosys command (hello.cc):
#include "kernel/yosys.h"
@ -85,7 +85,7 @@ the declarations for the following types in kernel/rtlil.h:
The module is a container with connected cells and wires
in it. The design is a container with modules in it.
All this types are also available without the RTLIL:: prefix in the Yosys
All these types are also available without the RTLIL:: prefix in the Yosys
namespace.
4. SigMap and other Helper Classes
@ -204,4 +204,4 @@ Notes on the existing codebase
For historical reasons not all parts of Yosys adhere to the current coding
style. When adding code to existing parts of the system, adhere to this guide
for the new code instead of trying to mimic the style of the surrounding code.
for the new code instead of trying to mimic the style of the surrounding code.

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@ -158,7 +158,7 @@ in `select` lines.
Index lines are using the `index <type> expr1 === expr2` syntax. `expr1` is
evaluated during matcher initialization and the same restrictions apply as for
`select` expressions. `expr2` is evaluated when the match is calulated. It is a
`select` expressions. `expr2` is evaluated when the match is calculated. It is a
function of any state variables assigned to by previous blocks. Both expression
are converted to the given type and compared for equality. Only cells for which
all `index` statements in the block pass are considered by the match.